coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-11-02	soc/amd/picasso: pass verstage timestamps to x86	Kangheui Won
2020-10-08	soc/amd/picasso: Print values from PSP transfer buffer	Martin Roth
2020-10-08	soc/amd/picasso: Refactor transfer buffer check	Martin Roth
2020-10-08	soc/amd/picasso: Die if the workbuf is missing two boots in a row	Martin Roth
2020-08-24	soc/amd/picasso: Reboot for recovery if no psp workbuf is found	Martin Roth
2020-07-08	soc/amd/picasso: Halt if workbuf is absent after psp_verstage	Martin Roth
2020-06-22	soc/amd/picasso/bootblock: Write EIP to secure S3	Raul E Rangel
2020-06-08	soc/amd/picasso: establish full early caching memory map	Aaron Durbin
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-01	soc/amd/picasso/bootblock: Remove duplicate sb_reset_i2c_slaves	Raul E Rangel
2020-05-01	soc/amd/picasso/bootblock/bootblock: Remove duplicate i2c init	Raul E Rangel
2020-05-01	soc/amd/picasso: Enable cache in bootblock	Felix Held
2020-04-29	soc/amd/picasso: Add bootblock support	Felix Held
2019-08-07	soc/amd/picasso: Set HAVE_BOOTBLOCK=n	Kyösti Mälkki
2019-07-02	soc/amd/picasso: Stub out bootblock	Martin Roth
2019-07-02	soc/amd/picasso: Create picasso as a copy of stoneyridge	Martin Roth