coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2023-06-09	soc/amd: add ops xhci_pci_ops to XHCI controllers in devicetree	Felix Held
2023-04-22	soc/amd/mendocino: drop code for non-existing eMMC controller	Felix Held
2023-04-21	soc/amd/mendocino: Mark PCIe GPP bridges as hidden instead of off	Martin Roth
2023-03-23	soc/amd/mendocino: Remove GPP bridge to Bus B	Martin Roth
2023-03-21	soc/amd/mendocino: Remove 2 unused PCIe functions	Martin Roth
2023-01-17	soc/amd: introduce and use common amd_cpu_bus_ops struct	Felix Held
2022-11-04	soc/amd/*/data_fabric: Use common device ops	Fred Reitberger
2022-10-20	soc/amd/*/uart: commonize UART code and MMIO device driver	Felix Held
2022-10-14	soc/amd/*: Hook up IOMMU ops in devicetree	Arthur Heymans
2022-10-14	soc/amd/*: Hook up LPC ops in devicetree	Arthur Heymans
2022-10-14	soc/amd/*: Hook up SMBus ops to devicetree	Arthur Heymans
2022-10-14	soc/amd: factor out common eMMC code	Felix Held
2022-10-13	soc/amd/*: Hook up GPU ops in devicetree	Arthur Heymans
2022-10-13	soc/amd/*: Hook up GPP bridges ops to devicetree	Arthur Heymans
2022-10-13	soc/amd/acp: Hook up ops in devicetree	Arthur Heymans
2022-10-13	soc/amd/mendocino: Use devicetree ops over pci driver	Arthur Heymans
2022-10-13	soc/amd/*: Hook up device_operations in chipset.cb	Arthur Heymans
2022-08-11	treewide: Rename Sabrina to Mendocino	Jon Murphy