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2024-07-15soc/amd/glinda/include/gpio: update to match hardwareFelix Held
The table "IOMUX Functional Table" in PPR #57254 rev. 1.60 was used as a reference. This should fix the ESPI_ALERT_D1 IOMUX setting for the boards using the Glinda SoC which previously didn't match the hardware. Compared to Phoenix, Glinda has two more chip select outputs for the SPI2 controller and an additional ZST_STUTTER_RAIL IOMUX function. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Id9adfbe0c7aee90d6fe990f239d82a1d013e7f5f Reviewed-on: https://review.coreboot.org/c/coreboot/+/83437 Reviewed-by: Anand Vaikar <a.vaikar2021@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2023-01-18soc/amd: Include <gpio.h> instead of <soc/gpio.h>Elyes Haouas
<gpio.h> chain-include <soc/gpio.h>. Change-Id: I112e41ad4c7ee638954dfe3f1ddfeb10c138459a Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71807 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2022-10-25soc/amd: Add framework for Glinda SoCMartin Roth
This adds the initial framework for the Glinda SoC, based on what's been done for Morgana already. I believe that there's more that can be made common, but that work will continue as both platforms are developed. Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Change-Id: I43d0fdb711c441dc410a14f6bb04b808abefe920 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68684 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>