summaryrefslogtreecommitdiff
path: root/src/soc/amd/glinda/gpio.c
diff options
context:
space:
mode:
authorMartin Roth <gaumless@gmail.com>2022-10-21 16:43:08 -0600
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2022-10-25 18:18:37 +0000
commitf95a11eff5217a396dc43288f0c547559b5d221a (patch)
treedab493e74f11acfaae6d5fed0add160288874f1e /src/soc/amd/glinda/gpio.c
parent0a5da517c4f8ebb8e13ec523ea073c503bd7fcaa (diff)
soc/amd: Add framework for Glinda SoC
This adds the initial framework for the Glinda SoC, based on what's been done for Morgana already. I believe that there's more that can be made common, but that work will continue as both platforms are developed. Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Change-Id: I43d0fdb711c441dc410a14f6bb04b808abefe920 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68684 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd/glinda/gpio.c')
-rw-r--r--src/soc/amd/glinda/gpio.c41
1 files changed, 41 insertions, 0 deletions
diff --git a/src/soc/amd/glinda/gpio.c b/src/soc/amd/glinda/gpio.c
new file mode 100644
index 0000000000..35d2bca47a
--- /dev/null
+++ b/src/soc/amd/glinda/gpio.c
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/* TODO: Update for Glinda */
+
+#include <amdblocks/gpio.h>
+#include <soc/gpio.h>
+#include <types.h>
+
+/* see the IOMUX function table for the mapping from GPIO number to GEVENT number */
+static const struct soc_amd_event gpio_event_table[] = {
+ { GPIO_0, GEVENT_21 }, /* GPIO0 may only be used as PWR_BTN_L in ACPI */
+ { GPIO_1, GEVENT_19 },
+ { GPIO_2, GEVENT_8 },
+ { GPIO_3, GEVENT_2 },
+ { GPIO_4, GEVENT_4 },
+ { GPIO_5, GEVENT_7 },
+ { GPIO_6, GEVENT_10 },
+ { GPIO_7, GEVENT_11 },
+ { GPIO_8, GEVENT_23 },
+ { GPIO_9, GEVENT_22 },
+ { GPIO_11, GEVENT_5 },
+ { GPIO_16, GEVENT_12 },
+ { GPIO_17, GEVENT_13 },
+ { GPIO_18, GEVENT_14 },
+ { GPIO_22, GEVENT_3 },
+ { GPIO_23, GEVENT_16 },
+ { GPIO_24, GEVENT_15 },
+ { GPIO_29, GEVENT_9 },
+ { GPIO_32, GEVENT_17 },
+ { GPIO_40, GEVENT_20 },
+ { GPIO_84, GEVENT_18 },
+ { GPIO_89, GEVENT_0 },
+ { GPIO_90, GEVENT_1 },
+ { GPIO_91, GEVENT_6 },
+};
+
+void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items)
+{
+ *table = gpio_event_table;
+ *items = ARRAY_SIZE(gpio_event_table);
+}