coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-01-30	soc/amd,intel: Drop leftover GNVS includes	Kyösti Mälkki
2021-01-28	soc/amd/common: Handle I2C resource only if base address is defined	Zheng Bao
2021-01-27	soc/amd/common: Only set write_acpi_tables if ACPI table is enabled	Zheng Bao
2021-01-26	soc/amd: Add an option to select if SOC supports ESPI sub decode	Zheng Bao
2021-01-19	soc/amd: Drop unnecessary <soc/nvs.h> include	Kyösti Mälkki
2021-01-13	ACPI: Have single call-site for acpi_inject_nvsa()	Kyösti Mälkki
2021-01-10	ACPI: Drop redundant CBMEM_ID_ACPI_GNVS allocations	Kyösti Mälkki
2020-12-15	soc/amd/common: Move lpc_util to verstage_x86	Kyösti Mälkki
2020-11-30	soc/amd/common: simplify conditionals in Makefiles	Felix Held
2020-09-21	soc/amd: Drop unneeded empty lines	Elyes HAOUAS
2020-09-11	soc/amd/common/espi_util: clarify espi_open_io_window	Felix Held
2020-08-12	soc/amd/common/espi_util: rename espi_check_status	Felix Held
2020-08-11	soc/amd/common/espi_util: espi_send_command: improve error message	Felix Held
2020-08-11	soc/amd/common/espi_util: espi_std_io_decode: fix edge case bug	Felix Held
2020-08-11	soc/amd/common/espi_util: simplify espi_std_io_decode function	Felix Held
2020-08-11	soc/amd/common/espi_util: make decode enable parameter uint32_t	Felix Held
2020-08-11	soc/amd/common/espi_util: make reg parameter unsigned	Felix Held
2020-07-16	soc/amd/common: Don't get eSPI address from PCI if not on x86	Martin Roth
2020-06-30	soc/amd/common/lpc: Skip SERIRQ setup when using eSPI	Marshall Dawson
2020-06-30	ACPI: Drop typedef global_nvs_t	Kyösti Mälkki
2020-06-02	src: Remove redundant includes	Elyes HAOUAS
2020-06-02	src: Remove duplicated includes	Elyes HAOUAS
2020-05-13	soc/amd/common/block: Add support for configuring eSPI connection to slave	Furquan Shaikh
2020-05-13	Remove new additions of "this file is part of" lines	Furquan Shaikh
2020-05-13	soc/amd/common/block/lpc: Add helper function lpc_early_init()	Furquan Shaikh
2020-05-12	soc/amd/common/block/lpc: Configure io/mmio windows differently for LPC and eSPI	Furquan Shaikh
2020-05-12	soc/amd/common/block/lpc: Provide an option to use static eSPI BAR	Furquan Shaikh
2020-05-12	soc/amd/common/block/lpc: Add helpers for managing eSPI decode	Furquan Shaikh
2020-05-12	soc/amd/common/block/lpc: Set LPC_IO_PORT_DECODE_ENABLE to 0 when disabling d...	Furquan Shaikh
2020-05-12	soc/amd/common/block/lpc: Split lpc_set_spibase() into two functions	Furquan Shaikh
2020-05-11	soc/amd/common/block/lpc: Reorganize LPC enable resources	Furquan Shaikh
2020-05-11	soc/amd/common/block/lpc: Add config options for eSPI	Furquan Shaikh
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-07	soc/amd/common/block/lpc: Use standard pci_dev_ops_pci	Furquan Shaikh
2020-05-05	soc/amd/common/block/lpc: Add lpc_disable_spi_rom_sharing	Raul E Rangel
2020-04-28	amd/family17h: Add PCI device IDs for all controllers in AMD Family17h	Furquan Shaikh
2020-04-24	soc/amd/picasso/i2c: don't initialize I2C4 as master and refactor code	Martin Roth
2020-04-05	soc/amd: Use SPDX for GPL-2.0-only files	Angel Pons
2020-04-02	Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`	Nico Huber
2020-03-18	soc: Remove copyright notices	Patrick Georgi
2019-10-20	soc/amd/common/lpc: Add SuperIO decode function	Marshall Dawson
2019-10-08	device: Use scan_static_bus() over scan_lpc_bus()	Nico Huber
2019-09-09	soc/amd/common/lpc: Add decode disable function	Marshall Dawson
2019-07-03	soc/amd/common/lpc: Add Picasso ID	Marshall Dawson
2019-06-06	soc/amd/stoneyridge: Move LPC support to common	Marshall Dawson