coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2017-12-12	soc/amd/common: Move AGESA related source files	Richard Spiegel
2017-12-12	soc/amd/common: Move Agesa related headers	Richard Spiegel
2017-12-11	soc/amd/common: Collect timestamps before and after AGESA calls	Martin Roth
2017-12-11	vc/amd/pi/00670F00/binaryPI: cache the AGESA dispatcher	Aaron Durbin
2017-11-16	vendorcode/amd/pi/00670F00: Get rid of filecodes, replace filecode.h	Martin Roth
2017-11-14	soc/amd/common: Remove direct AGESA header includes	Martin Roth
2017-11-10	soc/amd/common: Add DRAM clear option to northbridge.c	Richard Spiegel
2017-11-04	soc/amd/common: remove superfluous NULL initializers on globals	Aaron Durbin
2017-11-04	soc/amd/common: remove use of LibAmdMemFill()	Aaron Durbin
2017-10-22	soc/amd/common: Revert PI blob search hack	Marshall Dawson
2017-10-20	soc/amd/common: Set AltImageBasePtr to 0	Martin Roth
2017-09-27	amd/stoneyridge: Put AGESA heap into cbmem	Marshall Dawson
2017-09-26	AGESA: Avoid cpuRegisters.h include	Kyösti Mälkki
2017-07-11	binaryPI: Define AGESA blob in CBFS as Kconfig string	Kyösti Mälkki
2017-06-27	vendorcode/amd: Unify Porting.h across all targets	Stefan Reinauer
2017-06-26	soc/amd/stoneyridge: Add northbridge support	Marc Jones