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path: root/src/soc/amd/cezanne
AgeCommit message (Expand)Author
2021-02-14soc/amd/cezanne: Fill FADT and MADTRaul E Rangel
2021-02-14soc/amd/cezanne: Enable uCode updateRaul E Rangel
2021-02-13soc/amd/cezanne: select ACPI support and make the compiler happyFelix Held
2021-02-13soc/amd/cezanne/acpi: Add plain soc.aslRaul E Rangel
2021-02-13soc/amd/cezanne: always include PSP secure OS in amdfwFelix Held
2021-02-13soc/amd/cezanne: always add S0i3 firmware part to amdfwFelix Held
2021-02-13soc/amd/cezanne/bootblock: call write_resume_eip in bootblock_c_entryFelix Held
2021-02-12soc/amd/cezanne: drop PWRS from GNVSFelix Held
2021-02-12soc/amd/cezanne: Add PCI IRQ Router definitionsRaul E Rangel
2021-02-12soc/amd/cezanne/smihandler: add psp_notify_smm callFelix Held
2021-02-12soc/amd/cezanne: select RTCFelix Held
2021-02-12soc/amd: select ACPI_AMD_HARDWARE_SLEEP_VALUES in common ACPI codeFelix Held
2021-02-12soc/amd/*/Kconfig: remove redundant SMM_TSEG conditionFelix Held
2021-02-11soc/amd/cezanne/smihandler: add basic SMI APMC and sleep handlerFelix Held
2021-02-11soc/amd/cezanne: select soc-specific ACPI functionalityFelix Held
2021-02-11soc/amd/cezanne/chip: set device operations for UART MMIO devicesFelix Held
2021-02-11soc/amd/cezanne: add empty mp_init_cpusFelix Held
2021-02-11soc/amd/cezanne/cpu: add basic zen_2_3_init functionalityFelix Held
2021-02-11soc/amd/cezanne/smihandler: add missing southbridge_io_trap_handlerFelix Held
2021-02-11soc/amd: include cpu/x86/smm directory in common SMM MakefileFelix Held
2021-02-11soc/amd: move southbridge_smi_handler to common codeFelix Held
2021-02-11soc/amd: factor out common SMM relocation codeFelix Held
2021-02-11soc/amd/cezanne: add empty SMM-handlerFelix Held
2021-02-10soc/amd/cezanne/fch: add HAVE_SMI_HANDLER case to fch_init_acpi_portsFelix Held
2021-02-10soc/amd/cezanne: Add verstage supportRaul E Rangel
2021-02-10soc/amd/cezanne: Enable SOC_AMD_COMMON_BLOCK_SPIRaul E Rangel
2021-02-10soc/amd/cezanne: Add SPI registersRaul E Rangel
2021-02-10soc/amd/cezanne/chip: add empty set_mmio_dev_opsFelix Held
2021-02-10soc/amd/cezanne/chip: add empty cpu_bus_opsFelix Held
2021-02-10soc/amd: Move soc_route_sci to common/blocks/smi/smi_utilFelix Held
2021-02-09soc/amd/cezanne: Add root_complexRaul E Rangel
2021-02-09soc/amd/cezanne: add empty CPU driverFelix Held
2021-02-09soc/amd/cezanne: Enable early LPC support in bootblock stageZheng Bao
2021-02-09soc/amd,intel: Drop s3_resume parameter on FSP-S functionsKyösti Mälkki
2021-02-07soc/amd/cezanne/romstage: Store early dram regionRaul E Rangel
2021-02-07soc/amd/cezanne/Makefile.inc: Fix indentationRaul E Rangel
2021-02-07soc/amd/cezanne/pcie_gpp: scan internal PCI busesFelix Held
2021-02-07soc/amd/cezanne/chip: add PCI bus scanningFelix Held
2021-02-05soc/amd/cezanne/iomap: move MMIO range comment above MMIO rangesFelix Held
2021-02-05soc/amd/cezanne/fch: add ACPI I/O port setupFelix Held
2021-02-05soc/amd/cezanne: populate some FSP-M UPDsFelix Held
2021-02-03soc/amd/cezanne: remove UART2/3 AOAC device offsetsFelix Held
2021-02-03amdfwtool:cezanne: Add entry of PSP_BOOTLOADER_AB (0x73)Zheng Bao
2021-01-31soc/amd/cezanne/Kconfig: select common PSP gen2 supportFelix Held
2021-01-31soc/amd/cezanne: add soc/cpu.h with CPUID define for Cezanne A0 steppingFelix Held
2021-01-30soc/amd/cezanne: add use result of acpi_is_wakeup_s3() in FSP callsFelix Held
2021-01-29soc/amd/cezanne: add empty ramstage FCH supportFelix Held
2021-01-29soc/amd/cezanne/chip: add FSP silicon init driver callFelix Held
2021-01-29device/Kconfig: Declare MMCONF symbols' type onceAngel Pons
2021-01-28soc/amd/cezanne/Kconfig: move selections in alphabetical orderFelix Held
2021-01-28soc/amd/cezanne/chip: add empty SoC device operationsFelix Held
2021-01-28soc/amd/cezanne: compress FSP binaries in CBFSFelix Held
2021-01-27soc/amd/cezanne: Add UCODE firmware to CBFSZheng Bao
2021-01-27soc/amd: Throw an error if FWM_POSITION_INDEX is emptyZheng Bao
2021-01-24soc/amd/cezanne/Kconfig: select missing SSE2 optionFelix Held
2021-01-24soc/amd/cezanne/Kconfig: select X86_AMD_FIXED_MTRRSFelix Held
2021-01-24soc/amd/cezanne: add basic romstageFelix Held
2021-01-24soc,vendorcode/amd/cezanne: add basic FSP integrationFelix Held
2021-01-24soc/amd/cezanne: Add PSP integration for cezanneZheng Bao
2021-01-22soc/amd/cezanne: add pci_devs.hFelix Held
2021-01-21soc/amd/cezanne: include LAPIC code and set MAX_CPUS to 16Felix Held
2021-01-20soc/amd/cezanne/Kconfig: select IDT_IN_EVERY_STAGEFelix Held
2021-01-18ACPI: Select ACPI_SOC_NVS only where suitableKyösti Mälkki
2021-01-15soc/amd/cezanne,picasso/uart: remove unneeded struct nameFelix Held
2021-01-14soc/amd/cezanne: add remaining non-ACPI parts of UART supportFelix Held
2021-01-14soc/amd/cezanne: add AOAC supportFelix Held
2021-01-14soc/amd/cezanne: add console UART supportFelix Held
2021-01-11soc/amd/cezzane: Add a minimal chipset treeFurquan Shaikh
2021-01-10ACPI: Drop redundant CBMEM_ID_ACPI_GNVS allocationsKyösti Mälkki
2020-12-18soc/amd/cezanne: add GPIO supportFelix Held
2020-12-18soc/amd/cezanne: Add SMI supportZheng Bao
2020-12-17soc/amd/cezanne: add GPIO definitionsFelix Held
2020-12-13soc/amd/cezanne: add caching setup in bootblockFelix Held
2020-12-11soc/amd/cezanne: add 0xcf9 resetFelix Held
2020-12-11soc/amd/piasso,cezanne: add warning about using all-y in Makefile.incFelix Held
2020-12-09soc/amd/cezanne: print APU family and model in bootblock_soc_initFelix Held
2020-12-09soc/amd/cezanne: add basic early FCH initialization to bootblockFelix Held
2020-12-09soc/amd/cezanne: add common SMBus code to buildFelix Held
2020-12-09soc/amd/cezanne: call bootblock_main_with_basetime in bootblock_c_entryFelix Held
2020-12-09soc/amd: Remove Kconfig BOOTBLOCK_ADDRKyösti Mälkki
2020-12-09soc/amd: Remove Kconfig X86_RESET_VECTORKyösti Mälkki
2020-12-09soc/amd/cezanne: select common ACPIMMIO blockFelix Held
2020-12-06soc/amd/cezanne: add config.c and minimal chip.hFelix Held
2020-12-06soc/amd/cezanne: use common TSC and monotonic timer codeFelix Held
2020-12-05soc/amd/cezanne: add skeleton for new SoCFelix Held