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| author | Felix Held <felix-coreboot@felixheld.de> | 2021-02-12 15:49:06 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-02-13 17:09:11 +0000 |
| commit | 2e1384aa4790c90737bb082510862661b819ff84 (patch) | |
| tree | d9d8c84003aa4e3b2003f520cb37a71d995b4171 /src/soc/amd/cezanne | |
| parent | 84355a1aad496daabd3278e5316c380cd57f68dd (diff) | |
soc/amd/cezanne/bootblock: call write_resume_eip in bootblock_c_entry
Change-Id: I0b785abdd56af3bb67e3e36e5e3b40e544f0ca5a
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50596
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/cezanne')
| -rw-r--r-- | src/soc/amd/cezanne/bootblock.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/bootblock.c b/src/soc/amd/cezanne/bootblock.c index d1479da6f4..2447de64fc 100644 --- a/src/soc/amd/cezanne/bootblock.c +++ b/src/soc/amd/cezanne/bootblock.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <amdblocks/amd_pci_mmconf.h> +#include <amdblocks/cpu.h> #include <bootblock_common.h> #include <console/console.h> #include <cpu/amd/mtrr.h> @@ -88,6 +89,7 @@ static void set_caching(void) asmlinkage void bootblock_c_entry(uint64_t base_timestamp) { set_caching(); + write_resume_eip(); enable_pci_mmconf(); /* |