coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-05-10	psp_verstage: differentiate bios entry	Kangheui Won
2021-05-10	psp_verstage: move platform-specific code to chipset.c	Kangheui Won
2021-05-10	cezanne/psp_verstage: clean up duplicated target	Kangheui Won
2021-05-10	cezanne/psp_verstage: populate a/b firmware	Kangheui Won
2021-05-09	soc/amd/cezanne: Generate PCI GPP ACPI names	Raul E Rangel
2021-05-09	soc/amd/cezanne: Enable GNB IO-APIC _PRT	Raul E Rangel
2021-05-09	soc/amd/cezanne: add GNB IOAPIC support	Felix Held
2021-05-09	soc/amd/cezanne: Generate PCI routing table	Raul E Rangel
2021-05-09	soc/amd/cezanne: Populate PCI_INTR registers	Raul E Rangel
2021-05-08	soc/amd/cezanne/acpi/soc: call WAL1 for AC/DC state ALIB call	Felix Held
2021-05-05	soc/amd/cezanne/agesa_acpi: add add_agesa_fsp_acpi_table call	Felix Held
2021-05-05	soc/amd/cezanne/agesa_acpi: add and call agesa_write_acpi_tables	Felix Held
2021-05-02	soc/amd/cezanne: add verstage files	Kangheui Won
2021-04-30	amd/cezanne: Add telemetry setting to UPD	Chris Wang
2021-04-29	soc/amd/cezanne: Enable Audio Co-processor driver	Karthikeyan Ramasubramanian
2021-04-28	soc/amd/cezanne: copy psp_transfer.h from picasso	Kangheui Won
2021-04-28	soc/amd/cezanne: copy Kconfig options for psp_verstage	Kangheui Won
2021-04-26	soc/amd/cezanne: Update STAPM vars with units	Martin Roth
2021-04-26	amd/cezanne: Add slow_ppt_time & thermctl_limit to UPD	Martin Roth
2021-04-26	soc/amd/cezanne/fsp_m_params: Configure the s0i3_enable UPD	Karthikeyan Ramasubramanian
2021-04-26	soc/amd/cezanne,picasso/Kconfig: add help text for MAX_CPUS	Felix Held
2021-04-26	soc/amd/cezanne & picasso: Add Kconfig for hardcoded Soft Fuse bits	Martin Roth
2021-04-23	soc/amd/cezanne/cpu: make sure that MAX_CPUS isn't overridden	Felix Held
2021-04-23	soc/amd/cezanne: fix i2c compiler errors on non-x86	Kangheui Won
2021-04-22	guybrush: Add Kconfig for PSP eSPI and port80	Rob Barnes
2021-04-21	soc/amd/{cezanne,common}/acpi: Add _OSC method	Raul E Rangel
2021-04-21	soc/amd/cezanne: add SMU settings to devicetree	Felix Held
2021-04-21	soc/amd/cezanne: add downcoring and SMT disable settings to devicetree	Felix Held
2021-04-21	soc/amd/cezanne/chip.h: include missing types.h	Felix Held
2021-04-21	soc/amd/cezanne: Add support for C-state 3	Raul E Rangel
2021-04-20	soc/amd/{common,cezanne}: Add uPEP device	Raul E Rangel
2021-04-19	Revert "soc/amd/cezanne: Add support to perform early EC sync"	Karthikeyan Ramasubramanian
2021-04-18	soc/amd/cezanne/Kconfig: add missing ACPI_BERT and ACPI_BERT_SIZE	Felix Held
2021-04-16	soc/amd/cezanne: Update FADT to support S0i3	Jason Glenesk
2021-04-16	soc/amd/cezanne: Add modern standby option to chip config	Mathew King
2021-04-16	soc/amd/cezanne: Port ACPI p-state and c-state entries from picasso	Jason Glenesk
2021-04-16	soc/amd/cezanne: Add uart controllers to chipset.cb	Ivy Jian
2021-04-16	soc/amd/cezanne: Select VBNV_CMOS	Raul E Rangel
2021-04-14	soc/amd/cezanne/fch: process ACPI PM/GPE and GPIO events	Felix Held
2021-04-14	soc/amd/cezanne: save chipset state to CBMEM	Martin Roth
2021-04-10	soc/amd/cezanne: Set Power state after power failure	Karthikeyan Ramasubramanian
2021-04-10	soc/amd/cezanne: Add GRXS and GTXS method	Eric Lai
2021-04-08	soc/amd: remove special GPIO_2 override soc_gpio_hook	Kyösti Mälkki
2021-04-07	soc/amd/cezanne: Pass DXIO and DDI Descriptors to FSP	Matt Papageorge
2021-04-07	vc/amd/fsp/cezanne: update UPD headers	Matt Papageorge
2021-04-05	soc/amd/cezanne: Add soc/msr.h	Raul E Rangel
2021-04-05	soc/amd: Make espi_clear_decodes private	Raul E Rangel
2021-04-05	soc/amd: Make espi_configure_decodes private	Raul E Rangel
2021-04-05	soc/amd/cezanne: Clear eSPI ranges before configuring eSPI	Martin Roth
2021-04-02	soc/amd/cezanne: Add support to perform early EC sync	Karthikeyan Ramasubramanian
2021-04-01	soc/amd/cezanne: Enable GENERIC_GPIO_LIB	Raul E Rangel
2021-04-01	soc/amd/cezanne: Add device tree support for I2C	Raul E Rangel
2021-03-30	soc/amd/cezanne: Comment the AOAC register access	Karthikeyan Ramasubramanian
2021-03-29	soc/amd/cezanne: factor out UPD-M configuration from romstage	Felix Held
2021-03-29	soc/amd/cezanne,picasso: rename fsp_params.c to fsp_s_params.c	Felix Held
2021-03-29	soc/amd: add DISABLE_KEYBOARD_RESET_PIN option	Felix Held
2021-03-29	soc/amd/cezanne: Implement PROVIDES_ROM_SHARING	Raul E Rangel
2021-03-29	soc/amd: move PM_RST_CTRL1 register definition to common acpimmio header	Felix Held
2021-03-29	soc/amd/*/gpio: include types.h instead of stdint.h to have size_t	Felix Held
2021-03-24	mb/google/guybrush: disable KBRSTEN	Kangheui Won
2021-03-23	soc/amd/cezanne: select HAVE_EM100_SUPPORT	Felix Held
2021-03-22	soc/amd/cezanne: Initialize I2C	Zheng Bao
2021-03-22	soc/amd/cezanne: Get I2C specific code for cezanne	Zheng Bao
2021-03-18	soc/amd/cezanne/pci_gpp: Add ACPI names for GPP bridges	Raul E Rangel
2021-03-15	soc/amd/cezanne: Add i2c controllers to chipset.cb	Mathew King
2021-03-14	soc/amd/cezanne/Kconfig: turn on GOP	Nikolai Vyssotski
2021-03-13	soc/amd/cezanne/acpi/soc.asl: Include sleepstates.asl	Raul E Rangel
2021-03-13	soc/amd/cezanne/fsp_params.c: GOP: pass VBIOS pointer to FSP	Nikolai Vyssotski
2021-03-13	soc/amd/cezanne: Move globalnvs.asl to the correct location	Mathew King
2021-03-12	soc/amd: GOP: add UPD for VBIOS buffer	Nikolai Vyssotski
2021-03-12	soc/amd/cezanne: add XHCI SCI/GEVENT setup	Felix Held
2021-03-12	soc/amd/common/block/smu: rename mailbox register defines	Felix Held
2021-03-11	soc/amd: move warm reset flag function prototypes to common code	Felix Held
2021-03-10	soc/amd/cezanne: Add USB ports to chipset.cb	Mathew King
2021-03-10	mb/amd/majolica: Update to use proper APCBs built for Majolica	Matt Papageorge
2021-03-10	soc/amd/cezanne: select common APOB NV cache code	Felix Held
2021-03-10	soc/amd/cezanne/smihandler: add ELOG and SMMSTORE support	Felix Held
2021-03-09	soc/amd/cezanne/Makefile: pass APOB NV parameters to amdfwtool	Felix Held
2021-03-08	soc/amd/cezanne: Include gpio.c in smm	Mathew King
2021-03-08	soc/amd/cezanne: Allow GPIO defines to be used in ASL	Mathew King
2021-03-04	soc/amd/cezanne/chipset.cb: clean up and change some aliases	Felix Held
2021-03-04	soc/amd/cezanne/smihandler: implement S3 entry SMI handler	Felix Held
2021-03-04	soc/amd/cezanne: add SMU support	Felix Held
2021-03-03	soc/amd/cezanne/chipset.cb: rename alias for SATA controllers	Felix Held
2021-03-02	soc/amd/cezanne: Disable legacy DMA IO ports	Raul E Rangel
2021-03-02	soc/amd/cezanne: Fill out pci devices in chipset.cb	Mathew King
2021-03-01	soc/amd/cezanne: Add PSP whitelist debug unlock support	Raul E Rangel
2021-02-26	soc/amd/cezanne/acpi: Generate MADT LAPIC NMI settings	Raul E Rangel
2021-02-25	soc/amd/cezanne/acpi: Use IO addresses for ACPI block	Raul E Rangel
2021-02-25	soc/amd/cezanne/acpi: Add globalnvs.asl	Raul E Rangel
2021-02-25	soc/amd: only print CPU family and model in bootblock	Felix Held
2021-02-25	soc/amd/cezanne/Kconfig: sort selected options	Felix Held
2021-02-25	soc/amd/cezanne/acpi/pci0.asl: Add LPC device	Raul E Rangel
2021-02-24	soc/amd/cezanne: Add eSPI support	Zheng Bao
2021-02-24	soc/amd/cezanne/Makefile: move setting of PSP soft fuse bit 6	Felix Held
2021-02-22	soc/amd/cezanne/acpi: Add pci0.asl	Raul E Rangel
2021-02-22	soc/amd/cezanne/acpi/soc.asl: Add platform.asl	Raul E Rangel
2021-02-22	soc/amd/cezanne/acpi: Add MMIO devices	Raul E Rangel
2021-02-19	soc/amd/cezanne: add MP init and SMM initialization	Felix Held
2021-02-18	soc/amd/cezanne/root_complex: provide ACPI name in PCI device_operations	Felix Held