| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-04-16 | soc/amd/cezanne: Add uart controllers to chipset.cb | Ivy Jian |
| 2021-03-15 | soc/amd/cezanne: Add i2c controllers to chipset.cb | Mathew King |
| 2021-03-10 | soc/amd/cezanne: Add USB ports to chipset.cb | Mathew King |
| 2021-03-04 | soc/amd/cezanne/chipset.cb: clean up and change some aliases | Felix Held |
| 2021-03-03 | soc/amd/cezanne/chipset.cb: rename alias for SATA controllers | Felix Held |
| 2021-03-02 | soc/amd/cezanne: Fill out pci devices in chipset.cb | Mathew King |
| 2021-02-14 | soc/amd/cezanne/chipset.cb: add SMBus and data fabric PCI devices | Felix Held |
| 2021-02-14 | soc/amd/cezanne: move CPU cluster to chipset device tree | Felix Held |
| 2021-01-11 | soc/amd/cezzane: Add a minimal chipset tree | Furquan Shaikh |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |