| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-02-25 | soc/amd/cezanne/acpi: Add globalnvs.asl | Raul E Rangel |
| 2021-02-25 | soc/amd/cezanne/acpi/pci0.asl: Add LPC device | Raul E Rangel |
| 2021-02-22 | soc/amd/cezanne/acpi: Add pci0.asl | Raul E Rangel |
| 2021-02-22 | soc/amd/cezanne/acpi/soc.asl: Add platform.asl | Raul E Rangel |
| 2021-02-22 | soc/amd/cezanne/acpi: Add MMIO devices | Raul E Rangel |
| 2021-02-13 | soc/amd/cezanne/acpi: Add plain soc.asl | Raul E Rangel |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |