index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
amd
/
cezanne
/
Kconfig
Age
Commit message (
Expand
)
Author
2021-02-09
soc/amd/cezanne: Enable early LPC support in bootblock stage
Zheng Bao
2021-01-31
soc/amd/cezanne/Kconfig: select common PSP gen2 support
Felix Held
2021-01-29
device/Kconfig: Declare MMCONF symbols' type once
Angel Pons
2021-01-28
soc/amd/cezanne/Kconfig: move selections in alphabetical order
Felix Held
2021-01-28
soc/amd/cezanne: compress FSP binaries in CBFS
Felix Held
2021-01-27
soc/amd/cezanne: Add UCODE firmware to CBFS
Zheng Bao
2021-01-24
soc/amd/cezanne/Kconfig: select missing SSE2 option
Felix Held
2021-01-24
soc/amd/cezanne/Kconfig: select X86_AMD_FIXED_MTRRS
Felix Held
2021-01-24
soc,vendorcode/amd/cezanne: add basic FSP integration
Felix Held
2021-01-24
soc/amd/cezanne: Add PSP integration for cezanne
Zheng Bao
2021-01-21
soc/amd/cezanne: include LAPIC code and set MAX_CPUS to 16
Felix Held
2021-01-20
soc/amd/cezanne/Kconfig: select IDT_IN_EVERY_STAGE
Felix Held
2021-01-18
ACPI: Select ACPI_SOC_NVS only where suitable
Kyösti Mälkki
2021-01-14
soc/amd/cezanne: add AOAC support
Felix Held
2021-01-14
soc/amd/cezanne: add console UART support
Felix Held
2021-01-11
soc/amd/cezzane: Add a minimal chipset tree
Furquan Shaikh
2021-01-10
ACPI: Drop redundant CBMEM_ID_ACPI_GNVS allocations
Kyösti Mälkki
2020-12-18
soc/amd/cezanne: add GPIO support
Felix Held
2020-12-18
soc/amd/cezanne: Add SMI support
Zheng Bao
2020-12-11
soc/amd/cezanne: add 0xcf9 reset
Felix Held
2020-12-09
soc/amd/cezanne: add common SMBus code to build
Felix Held
2020-12-09
soc/amd: Remove Kconfig BOOTBLOCK_ADDR
Kyösti Mälkki
2020-12-09
soc/amd: Remove Kconfig X86_RESET_VECTOR
Kyösti Mälkki
2020-12-09
soc/amd/cezanne: select common ACPIMMIO block
Felix Held
2020-12-06
soc/amd/cezanne: use common TSC and monotonic timer code
Felix Held
2020-12-05
soc/amd/cezanne: add skeleton for new SoC
Felix Held