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Commit message (
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Author
2021-01-07
security/intel/txt: Don't run SCHECK on CBnT
Arthur Heymans
2021-01-04
security/intel/txt/ramstage.c: Fix clearing secrets on CBNT
Arthur Heymans
2020-12-29
sec/intel/txt/Kconfig: Make TXT HEAP and SINIT size configurable
Arthur Heymans
2020-12-02
cbfs: Simplify load/map API names, remove type arguments
Julius Werner
2020-10-22
sec/intel/txt: Only run LockConfig for LT-SX
Angel Pons
2020-10-22
sec/intel/txt: Always run SCHECK on regular boots
Angel Pons
2020-10-22
sec/intel/txt: Allow skipping ACM NOP function
Angel Pons
2020-10-22
sec/intel/txt/ramstage.c: Do not init the heap on S3 resume
Angel Pons
2020-10-22
sec/intel/txt/ramstage.c: Extract heap init into a function
Angel Pons
2020-10-22
sec/intel/txt: Add and fill in BIOS Specification info
Angel Pons
2020-10-22
sec/intel/txt: Move DPR size to Kconfig
Angel Pons
2020-10-17
intel/txt: Add `txt_get_chipset_dpr` function
Angel Pons
2020-10-15
security/intel/txt: Use `smm_region()` to get TSEG base
Angel Pons
2020-10-12
security/intel/txt: Add and use DPR register layout
Angel Pons
2020-10-12
security/intel/txt: Clean up includes
Angel Pons
2020-08-18
src: Remove unused 'include <lib.h>'
Elyes HAOUAS
2020-07-31
security/intel/txt: Add Intel TXT support
Philipp Deppenwiese