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path: root/src/northbridge
AgeCommit message (Expand)Author
2013-03-21haswell: Drop the device ID check in graphics init pathDuncan Laurie
2013-03-21haswell: add multipurpose SMM memory regionAaron Durbin
2013-03-21haswell: use s3_resume field in romstage_handoffAaron Durbin
2013-03-21haswell: cbmem_get_table_location() implementationAaron Durbin
2013-03-20haswell: drop memory reservation for sandybridge GPU bugDuncan Laurie
2013-03-19AMD Fam15: Add SPD read functions to wrapper codeKimarie Hoot
2013-03-18haswell: move call site of save_mrc_data()Aaron Durbin
2013-03-18haswell: remove unused sys_info structureAaron Durbin
2013-03-18haswell: adjust CAR usageAaron Durbin
2013-03-18haswell: fix ACPI MCFG tableAaron Durbin
2013-03-18haswell: enable caching before SMM initializationAaron Durbin
2013-03-17haswell platforms: restructure romstage mainAaron Durbin
2013-03-17haswell: include TSEG region in cacheable memoryAaron Durbin
2013-03-17i945: Replace some two magic values by defined namesPatrick Georgi
2013-03-16haswell: don't add a 0-sized memory range resourceAaron Durbin
2013-03-15Google Link: Add remaining code to support native graphicsRonald G. Minnich
2013-03-15haswell: Fix BDSM and BGSM indicies in memory mapAaron Durbin
2013-03-15haswell: reserve default SMRAM spaceAaron Durbin
2013-03-15haswell: resource allocationAaron Durbin
2013-03-14haswell: more ULT/LP support and minor tweaksDuncan Laurie
2013-03-14haswell: Add VGA PCI ID mappingsAaron Durbin
2013-03-14haswell: Add ULT device IDsDuncan Laurie
2013-03-14graysreef: update platform informationAaron Durbin
2013-03-14haswell: remove explicit pcie config accessesAaron Durbin
2013-03-14haswell: add PCI id supportAaron Durbin
2013-03-14haswell: Remove logic to send dram init done to MEAaron Durbin
2013-03-14haswell: notes and updates.Aaron Durbin
2013-03-14haswell: align pei_data structure with intel-frameworkAaron Durbin
2013-03-14haswell: use #defines for constants in udelay.cAaron Durbin
2013-03-14haswell: Add LPT LP device IDs to platform reportDuncan Laurie
2013-03-14haswell: Update GPU power management setupDuncan Laurie
2013-03-14haswell: always use MMIO PCI config accessesAaron Durbin
2013-03-14haswell: Add initial support for Haswell platformsAaron Durbin
2013-03-09Add Intel Panther Point USB3 initializationMarc Jones
2013-03-07AMD Fam14: Add SPD read functions to wrapper codeMartin Roth
2013-03-07Intel e7505: provide get_top_of_ramKyösti Mälkki
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2013-02-28Drop CONFIG_WRITE_HIGH_TABLESStefan Reinauer
2013-02-20Whitespace: Replace tab character in license text with two spacesPaul Menzel
2013-02-18AMD Family12h: Fix warningsMartin Roth
2013-02-14sconfig: rename lapic_cluster -> cpu_clusterStefan Reinauer
2013-02-14sconfig: rename pci_domain -> domainStefan Reinauer
2013-02-11spi.h: Rename the spi.h to spi-generic.hZheng Bao
2013-02-11Intel: Replace MSR 0xcd with MSR_FSB_FREQPatrick Georgi
2013-02-04Add MMCONF resource to AMD fam15 PCI_DOMAINSteven Sherk
2013-02-04Family 12: Update for string portabilityMike Loptien
2013-02-04Family 15tn: Update for string portabilityMike Loptien
2013-02-04Family 10: Update for string portabilityMike Loptien
2013-02-04Family 15: Update for string portabilityMike Loptien
2013-02-04Add MMCONF resource to AMD fam15tn PCI_DOMAINSteven Sherk
2013-02-01Fam15tn: Move SPD read from mainboards into wrapperMartin Roth
2013-01-30Extend CBFS to support arbitrary ROM source media.Hung-Te Lin
2013-01-30Rename family15 pci northbridgeops functions.Steven Sherk
2013-01-30Rename family15tn pci northbridgeops functions.Steven Sherk
2013-01-30Family 14: Update for string portability.Mike Loptien
2013-01-22Add MMCONF resource to AMD fam14 PCI_DOMAIN.Marc Jones
2013-01-22Rename fam14 pci northbridge ops functions.Marc Jones
2013-01-22F15tn: Fix all warnings, enable warnings as errorsMartin Roth
2013-01-21AGESA F15tn: Move callouts into northbridge wrapperMartin Roth
2013-01-21F15tn: Modify devicetree to fix S3 resumeMartin Roth
2013-01-14Support for Celeron 1007UStefan Reinauer
2013-01-04rd890: clear IO-APIC before setupAladyshev Konstantin
2012-12-07Add function to map vendor/device to generic VBIOS IDsDave Frodin
2012-11-30Rename devices -> deviceStefan Reinauer
2012-11-28Remove assembly coded log2 functionRonald G. Minnich
2012-11-28amdk8/amdfam10: Use CAR_GLOBAL for sysinfoPatrick Georgi
2012-11-27Drop driver-y from GM45/ICH9/RK9Stefan Reinauer
2012-11-27Remove AMD special case for LAPIC based udelay()Patrick Georgi
2012-11-27Get rid of drivers classPatrick Georgi
2012-11-27intel/gm45: new northbridgePatrick Georgi
2012-11-24yabel: Use X86_* instead of the more verbose M.x86.REG_*Patrick Georgi
2012-11-24x86 realmode: Use x86emu register file + definesPatrick Georgi
2012-11-24x86 realmode: Adapt to x86emu/YABEL style return codesPatrick Georgi
2012-11-24x86emu: Move realmode handler into own directoryPatrick Georgi
2012-11-17Drop no-op bootblock.cKyösti Mälkki
2012-11-17Use new system agent binariesStefan Reinauer
2012-11-14VIA chipsets: fix compilation without real mode codeStefan Reinauer
2012-11-14Sandybridge: Set PEG clock gatingMarc Jones
2012-11-14Add PCIe init and NMode flag to PEI data structureStefan Reinauer
2012-11-14Add ddr3lv_support flag to pei_data structureDuncan Laurie
2012-11-14pei_data.h: Fix commentMarc Jones
2012-11-14Provide MRC with a console printing callback functionVadim Bendebury
2012-11-12Initial IGD OpRegion implementationStefan Reinauer
2012-11-12Avoid using hardcoded values in MRC cache codeVadim Bendebury
2012-11-09Make coreboot use the offset parameter in cbfstool createStefan Reinauer
2012-11-09Make register/value lists constStefan Reinauer
2012-11-07SandyBridge/IvyBridge: Use flash map to find MRC cacheStefan Reinauer
2012-11-07Add missing newline in error messageStefan Reinauer
2012-11-07AMD G34 CPU: change lapic_id in northbridge.c to accommodate G34 CPUSiyuan Wang
2012-11-07CMOS: Move MRC seed offset into upper bankDuncan Laurie
2012-11-07AMD rd890 late.c: Don't enable PCIe ports after PCIe init.Siyuan Wang
2012-11-07AMD agesa family15: PCI domain should scan bus from 0x18.0Siyuan Wang
2012-11-02Fix some issues with new "reference" toolchainStefan Reinauer
2012-10-26northbridge/sch: move the \n so it reads a little betterSebastian Andrzej Siewior
2012-10-26northbridge/sch: read the size of main memory from the proper registerSebastian Andrzej Siewior
2012-10-26northbridge/sch: Read the GPU memory from the correct PCI deviceSebastian Andrzej Siewior
2012-10-26northbridge/sch: don't overwrite hightables with GPU / TSEG memorySebastian Andrzej Siewior
2012-10-08hpet: common ACPI generationPatrick Georgi
2012-10-07Remove chip.h files without config structureKyösti Mälkki
2012-09-25HAVE_HIGH_TABLES is gonePatrick Georgi
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