coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2017-04-14	northbridge/via/cn700: Add some delays during raminit	Lubomir Rintel
2017-04-06	northbridge/via/cn700: Get rid of #include raminit.c	Lubomir Rintel
2016-10-01	northbridge/via/cn700: transition away from device_t	Antonello Dettori
2016-09-20	northbridge/via: Add space around operators	Elyes HAOUAS
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-02-15	x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer	Kevin Paul Herbert
2015-01-06	northbridge: Drop print_ implementation from non-romcc boards	Stefan Reinauer
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2011-10-14	Fix compilation of VIA CN700 northbridge code with gcc 4.6	Stefan Reinauer
2011-04-21	more ifdef -> if fixes	Stefan Reinauer
2010-08-01	Clarify a comment on an old hack, remove the call to early_mtrr_init	Corey Osgood
2010-04-27	Since some people disapprove of white space cleanups mixed in regular commits	Stefan Reinauer
2010-04-09	zero warning days.	Stefan Reinauer
2010-03-31	Drop \r\n and \n\r as both print_XXX and printk now do this internally.	Stefan Reinauer
2010-03-05	This patch is from 2009-10-20	Uwe Hermann
2008-10-09	Indent-based + manual cleanups for CN700 (trivial). As this will be ported	Uwe Hermann
2008-09-01	This patch gets the Epia-CN working without ACPI or APIC.	Bari Ari
2008-05-19	Add support for the VIA EPIA-CN baord, which uses C7 + CN700 + VT8237R.	Aaron Lwe
2008-02-21	Add support for the Via CN700 with a C7 CPU and DDR2 RAM. Only a single DIMM is	Corey Osgood