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path: root/src/northbridge/intel
AgeCommit message (Expand)Author
2016-02-19nb/intel/sandybridge/raminit: Improve loggingPatrick Rudolph
2016-02-18nb/intel/sandybridge: Start PEG link trainingPatrick Rudolph
2016-02-18southbridge/intel/bd82x6x: Use common gpio.cPatrick Rudolph
2016-02-16nb/intel/sandybridge/raminit: Add shift offsetPatrick Rudolph
2016-02-13sandybridge: Always include MRC if not using native RAM init.Vladimir Serbinenko
2016-02-12Make MRC vs native a config rather than making a separate chipset for it.Vladimir Serbinenko
2016-02-12Merge sandy/ivybridge romstage flow for MRC and non-MRC.Vladimir Serbinenko
2016-02-10Kconfig: Move defaults for CBFS_SIZEMartin Roth
2016-02-09sandybridge: Set all native gfx-related options in northbridge code.Vladimir Serbinenko
2016-02-09ivy: Add a possiblity for mainboard early init.Vladimir Serbinenko
2016-02-09Revert "northbridge/intel/peg: Disable unused ports"Nico Huber
2016-02-04northbridge/intel/peg: Disable unused portsPatrick Rudolph
2016-02-04nb/intel/sandybridge/raminit: Fix two dimms per channelPatrick Rudolph
2016-01-29Revert "northbridge/intel/sandybridge: Fix random raminit failures"Vladimir Serbinenko
2016-01-29nb/intel/x4x: Move to early cbmemDamien Zammit
2016-01-29nb/intel/x4x: Cleanup gma.cDamien Zammit
2016-01-29nb/intel/x4x: Tidy up raminit and fix msbpos() functionDamien Zammit
2016-01-29nb/intel/x4x: Tidy up northbridgeDamien Zammit
2016-01-29nb/intel/x4x: Fix memory hole with both channels populatedDamien Zammit
2016-01-28nb/intel/pineview: Native VGA init (CRT)Damien Zammit
2016-01-26nb/intel/pineview: Increase MMCONF decoding to 256 bussesDamien Zammit
2016-01-20nb/intel/pineview: Use macro names for memory base registersDamien Zammit
2016-01-18nb/intel/pineview: Fix decode_pciebar()Damien Zammit
2016-01-18header files: Fix guard name comments to match guard namesMartin Roth
2016-01-17intel/sandybridge/raminit: fix ODT settingPatrick Rudolph
2016-01-14nb/intel/gm45: Backport configuration of panel power timingsNico Huber
2016-01-14nb/intel/gm45: Drop unnecessary panel power handlingNico Huber
2016-01-13intel/northbridge/sandy: raminit code cleanupPatrick Rudolph
2016-01-13northbridge/intel/x4x: clean up includesMartin Roth
2016-01-12nb/intel/gm45: Convert gma.c to `if (IS_ENABLED(` styleNico Huber
2016-01-07Correct some common spelling mistakesMartin Roth
2015-12-31nb/intel/gm45: Export low-power and (SFF) optionsNico Huber
2015-12-30northbridge/intel/x4x: Native raminitDamien Zammit
2015-12-29northbridge/intel/x4x: Intel 4-series northbridge supportDamien Zammit
2015-12-16northbridge/intel ACPI: Remove unused Local methodMartin Roth
2015-12-15x86 acpi: remove ALIGN_CURRENT macroAaron Durbin
2015-12-06Remove #ifdef checks on Kconfig symbolsMartin Roth
2015-12-02northbridge/intel/pineview: Add native raminitDamien Zammit
2015-12-02northbridge/intel/pineview: Add remaining boilerplate code for northbridgeDamien Zammit
2015-11-24northbridge/intel/pineview: Add minimal Pineview northbridgeDamien Zammit
2015-11-19nb/intel/sandybridge/raminit: Factor out code into toggle_io_resetPatrick Rudolph
2015-11-19nb/intel/sandybridge/raminit: Comment the codePatrick Rudolph
2015-11-18nb/intel/sandybridge: Fix PEG disablementPatrick Rudolph
2015-11-18nb/intel/sandybridge/northbridge: Initialize uma_memory_base in all casesPatrick Rudolph
2015-11-18northbridge/intel/sandybridge: Fix random raminit failuresPatrick Rudolph
2015-11-17northbridge/intel/fsp_sandybridge: remove blank lineMartin Roth
2015-11-10northbridge/intel: Add i89xx header fileMarc Jones
2015-11-05nb/intel/sandybridge: Limit GFX workaround to Sandy BridgeNico Huber
2015-11-04nb/intel/sandybridge: Add ACPI DMAR tableNico Huber
2015-11-04nb/intel/sandybridge: Enable basic IOMMU supportNico Huber
2015-11-04ACPI: Make DMAR flags settableNico Huber
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-30Drop northbridge/i440lxStefan Reinauer
2015-10-29nb/intel/sandybridge/gma: add disable functionPatrick Rudolph
2015-10-23Intel: Move MCRS ResourceTemplate outside of _CRS methodMartin Roth
2015-10-22Revert "Remove sandybridge and ivybridge FSP code path"Martin Roth
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-10-14Revert "Remove FSP Rangeley SOC and mohonpeak board support"Martin Roth
2015-10-12gma: Consolidate Intel IGD ACPI code some moreNico Huber
2015-10-11Kill lvds_num_lanesVladimir Serbinenko
2015-10-11Derive lvds_dual_channel from EDID timings.Vladimir Serbinenko
2015-10-09nb/intel/sandybridge/raminit: Add edge write discovery checkPatrick Rudolph
2015-10-09northbridge/intel/sandybridge: Do not disable PEG by defaultPatrick Rudolph
2015-10-09northbridge/intel/sandybridge: Enable PEG clock-gating on demandPatrick Rudolph
2015-10-04northbridge/intel/nehalem: Fix native VGA initNicolas Reinecke
2015-10-03Remove FSP Rangeley SOC and mohonpeak board supportAlexandru Gagniuc
2015-10-03Remove sandybridge and ivybridge FSP code pathAlexandru Gagniuc
2015-10-03sandybridge ivybridge: Treat native init as first class citizenAlexandru Gagniuc
2015-10-01northbridge/intel/gm45: Fix native VGA initAudrey Pearson
2015-09-24coreboot: move TS_END_ROMSTAGE to one spotAaron Durbin
2015-09-07intel/sandybridge: Do not guard native VGA init by #ifdefsAlexandru Gagniuc
2015-09-07intel i945: Fix native VGA initializationMono
2015-09-07north/intel/sandybridge: Fix native VGA initializationAlexandru Gagniuc
2015-09-07intel: Do not hardcode the position of mrc.cacheAlexandru Gagniuc
2015-09-04bootstate: remove need for #ifdef ENV_RAMSTAGEAaron Durbin
2015-09-04x86: remove cpu_incs as romstage Make variableAaron Durbin
2015-08-31northbridge/intel/gm45/Kconfig: Remove IOMMU symbol choiceMartin Roth
2015-08-28edid: Use edid_mode struct to reduce redundancyDavid Hendricks
2015-08-25Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in KconfigMartin Roth
2015-08-10intel/i945: don't read structs out of uninitialized pointersPatrick Georgi
2015-07-29intel/haswell: fix CHROMEOS builds for haswellPatrick Georgi
2015-07-22intel raminit: rewrite timB high adjust calculationPatrick Rudolph
2015-07-22intel raminit: support two DIMMs per channelPatrick Rudolph
2015-07-17Remove unused Kconfig symbols in c codeMartin Roth
2015-07-14intel/sandybridge/gma: Add graphics PCI Device IDs 0x0162 and 0x0152Damien Zammit
2015-07-13x86: flatten hierarchyStefan Reinauer
2015-07-13intel raminit: improve loggingPatrick Rudolph
2015-07-13intel raminit: fix timB high adjust calculationPatrick Rudolph
2015-07-13intel raminit: whitespace fixesPatrick Rudolph
2015-07-13intel sandybridge: add VGA pci device idPatrick Rudolph
2015-07-12Change #ifdef and #if defined CONFIG_ bools to #if IS_ENABLED()Martin Roth
2015-07-07sandybridge: provide monotonic timer functionPatrick Georgi
2015-07-06Revert "sandy/ivybridge: use LAPIC timer in SMM"Patrick Georgi
2015-07-04Kconfig: Fix references to obsolete symbolsMartin Roth
2015-07-04intel raminit: rename registerPatrick Rudolph
2015-07-02sandy/ivybridge: use LAPIC timer in SMMStefan Reinauer
2015-06-30intel/sandybridge: initialize variablePatrick Georgi
2015-06-28intel raminit: check correct registers in channel_testPatrick Rudolph
2015-06-28intel raminit: properly handle DDR3 DIMMs with address mirroringPatrick Rudolph
2015-06-23Kconfig: Move CBFS_SIZE into Mainboard menuMartin Roth
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