| Age | Commit message (Expand) | Author |
|---|
| 2018-08-01 | nb/intel/x4x: Don't use PCI operations on the pci_domain device | Arthur Heymans |
| 2018-07-30 | x4x/raminit_ddr23: use MCHBAR AND/OR/AND_OR macros [1/2] | Felix Held |
| 2018-07-30 | northbridge/x4x: add MCHBAR AND/OR/AND_OR access macros | Felix Held |
| 2018-06-29 | sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tables | Arthur Heymans |
| 2018-06-17 | nb/intel/x4x: Issue a hard reset with empty MRC cache on warm reset | Arthur Heymans |
| 2018-06-14 | nb/intel/x4x: Deprecate native graphic init | Arthur Heymans |
| 2018-06-14 | nb/intel/x4x: Fix a few things in set_enhanced_mode | Arthur Heymans |
| 2018-06-14 | nb/intel/x4x: Work around a quirk | Arthur Heymans |
| 2018-06-14 | nb/intel/x4x: Add the option for stacked channel map settings | Arthur Heymans |
| 2018-06-08 | libgfxinit: Enable G45 support (for GM45/X4X) | Nico Huber |
| 2018-06-06 | arch/x86: Make RELOCATABLE_RAMSTAGE the default | Kyösti Mälkki |
| 2018-06-05 | nb/intel/x4x: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-04 | nb/intel: Use postcar_frame_add_romcache() | Nico Huber |
| 2018-06-04 | northbridge/intel: Remove unneeded includes | Elyes HAOUAS |
| 2018-05-31 | {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate | Nico Huber |
| 2018-05-24 | nb/intel/x4x: Adapt post JEDEC for DDR3 | Arthur Heymans |
| 2018-05-24 | nb/intel/x4x/raminit: Add DDR3 enhanced mode and power settings | Arthur Heymans |
| 2018-05-24 | nb/intel/x4x/raminit: Add DDR3 specific dra/drb settings | Arthur Heymans |
| 2018-05-24 | nb/intel/x4x: Implement write leveling | Arthur Heymans |
| 2018-05-24 | nb/intel/x4x: Add DDR3 JEDEC init | Arthur Heymans |
| 2018-05-14 | nb/intel/x4x/raminit: DDR3 specific ODT | Arthur Heymans |
| 2018-05-14 | nb/intel/x4x: Add DDR3 rcomp | Arthur Heymans |
| 2018-05-14 | nb/intel/x4x/raminit: Support programming initials DD3 DLL setting | Arthur Heymans |
| 2018-05-14 | nb/intel/x4x/raminit: Support programming DDR3 timings | Arthur Heymans |
| 2018-05-14 | nb/intel/x4x/raminit: Make programming launch ddr3 specific | Arthur Heymans |
| 2018-05-14 | nb/intel/x4x/raminit: Make programming crossclock support DDR3 | Arthur Heymans |
| 2018-05-14 | nb/intel/x4x: Rename a things that are not specific to DDR2 | Arthur Heymans |
| 2018-05-14 | nb/x4x/raminit: Decode ddr3 dimms | Arthur Heymans |
| 2018-05-14 | nb/intel/x4x/raminit: Fix programming dual channel registers | Arthur Heymans |
| 2018-05-08 | {mb,nb,soc}: Remove references to pci_bus_default_ops() | Nico Huber |
| 2018-05-01 | nb/intel/x4x: Change memory layout to improve MTRR | Arthur Heymans |
| 2018-05-01 | nb/intel/x4x: Fix programming CxDRB | Arthur Heymans |
| 2018-05-01 | nb/intel/x4x: Implement both read and write training | Arthur Heymans |
| 2018-04-30 | nb/x4x: Get rid of device_t | Elyes HAOUAS |
| 2018-04-28 | nb/intel/x4x: Fix computing page_size | Arthur Heymans |
| 2018-04-17 | nb/intel/x4x/rcven.c: Change the verbosity of some messages | Arthur Heymans |
| 2018-04-17 | nb/intel/x4x: Add a convenient macro to loop over bytelanes | Arthur Heymans |
| 2018-04-17 | nb/intel/x4x: Clarify the raminit memory mapping | Arthur Heymans |
| 2018-04-17 | nb/intel/x4x: Refactor setting default dll settings | Arthur Heymans |
| 2018-04-17 | nb/intel/x4x: Use SPI flash to cache raminit results | Arthur Heymans |
| 2018-02-22 | device/ddr2,ddr3: Rename and move a few things | Arthur Heymans |
| 2018-02-20 | nb/x4x/raminit_ddr2: Refactor clock configuration slightly | Jonathan Neuschäfer |
| 2018-01-05 | nb/intel/x4x: Disable watchdog, halt TCO timer and clear timeout | Arthur Heymans |
| 2017-12-16 | nb/x4x/raminit: Rewrite SPD decode and timing selection | Arthur Heymans |
| 2017-12-12 | nb/intel/x4x/rcven.c: Fix programming coarse offset | Arthur Heymans |
| 2017-10-13 | nb/intel/*/gma: Port ACPI opregion to older platforms | Patrick Rudolph |
| 2017-09-22 | nb/intel/x4x: Select LAPIC_MONOTONIC_TIMER | Arthur Heymans |
| 2017-08-20 | nb/intel/x4x: Fix booting with FSB800 DDR667 combination | Arthur Heymans |
| 2017-08-20 | nb/intel/x4x/raminit: Rework receive enable calibration | Arthur Heymans |
| 2017-08-11 | nb/intel/x4x/gma.c: Probe VGA EDID on DVI-I ports | Arthur Heymans |
| 2017-08-07 | nb/intel/*/gma.c: Use macros for GMBUS numbers | Arthur Heymans |
| 2017-07-21 | nb/intel/x4x: Rework programming DQ and DQS DLL timings | Arthur Heymans |
| 2017-07-21 | sb/intel/i82801jx: Add correct PCI ids and change names | Arthur Heymans |
| 2017-06-04 | Kconfig: Add choice of framebuffer mode | Nico Huber |
| 2017-06-02 | Kconfig: Introduce HAVE_(VBE_)LINEAR_FRAMEBUFFER | Nico Huber |
| 2017-06-02 | Kconfig: Rework MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG | Nico Huber |
| 2017-05-24 | nb/intel/x4x/raminit: Initialise async variable | Arthur Heymans |
| 2017-05-22 | nb/intel/x4x: Use a struct for dll settings instead of an array | Arthur Heymans |
| 2017-05-21 | nb/intel/x4x: Make raminit less verbose with CONFIG_DEBUG_RAM_SETUP | Arthur Heymans |
| 2017-05-20 | nb/intel/x4x/raminit: Remove very long delay | Arthur Heymans |
| 2017-05-13 | nb/intel/x4x: Fix uninitialized variable issue | Nico Huber |
| 2017-05-11 | nb/intel/x4x: Define and use default MMCONF_BASE_ADDRESS | Arthur Heymans |
| 2017-05-10 | nb/intel/x4x: Add support for second PEG slot | Arthur Heymans |
| 2017-05-09 | nb/x4x: Do not enable IGD when not supported | Arthur Heymans |
| 2017-05-09 | nb/intel/x4x: Don't run NGI if IGD has not been assigned VGA cycles | Arthur Heymans |
| 2017-05-09 | nb/x4x: Add ramstage IGD disable function | Arthur Heymans |
| 2017-05-09 | nb/x4x/nortbridge.c: Compute TSEG resource allocation dynamically | Arthur Heymans |
| 2017-05-08 | nb/x4x/raminit.c: Remove ME locking code | Arthur Heymans |
| 2017-05-04 | nb/intel/x4x/raminit: Change reset type on incomplete raminit reset | Arthur Heymans |
| 2017-04-15 | nb/intel/x4x/Kconfig: Don't fix CBFS_SIZE on i82801gx southbridge | Arthur Heymans |
| 2017-03-21 | nb/x4x: Move checkreset before SPD reading | Arthur Heymans |
| 2017-03-21 | nb/intel/x4x: Fix issues found by checkpatch.pl | Arthur Heymans |
| 2017-02-17 | nb/intel/x4x: Implement resume from S3 suspend | Arthur Heymans |
| 2017-02-17 | nb/intel/x4x: Fix raminit on reset path | Arthur Heymans |
| 2017-01-22 | nb/x4x/raminit: Fix programming dram timings | Arthur Heymans |
| 2017-01-06 | nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h> | Arthur Heymans |
| 2016-12-17 | nb/x4x: Add other Eaglelake IGD PCI DID to list | Arthur Heymans |
| 2016-12-11 | intel i945 gm45 x4x: Switch to RELOCATABLE_RAMSTAGE | Kyösti Mälkki |
| 2016-12-11 | intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup | Kyösti Mälkki |
| 2016-12-11 | intel i945 gm45 x4x: Apply cbmem_top() alignment | Kyösti Mälkki |
| 2016-12-08 | buildsystem: Drop explicit (k)config.h includes | Kyösti Mälkki |
| 2016-12-07 | MMCONF_SUPPORT: Flip default to enabled | Kyösti Mälkki |
| 2016-12-03 | nb/x4x: Fix sticky scratchpad register offset | Arthur Heymans |
| 2016-11-28 | nb/intel/x4x/raminit: Fix DIMM_IN_CHANNEL calculation | Nico Huber |
| 2016-11-26 | nb/intel/x4x: Fix and deflate `dimm_config` in raminit | Nico Huber |
| 2016-11-22 | Remove explicit select MMCONF_SUPPORT | Kyösti Mälkki |
| 2016-11-21 | nb/intel: Fix some spelling mistakes in comments and strings | Martin Roth |
| 2016-11-11 | intel post-car: Separate files for setup_stack_and_mtrrs() | Kyösti Mälkki |
| 2016-11-08 | nb/x4x/raminit.c: Improve crossclock table cosmetics | Arthur Heymans |
| 2016-10-26 | nb/x4x/gma.c: Remove writes to DP, FDI registers | Arthur Heymans |
| 2016-10-19 | nb/gm45,x4x/gma.c remove writes to nonexisting FDI registers | Arthur Heymans |
| 2016-10-19 | nb/i945,gm45,x4x/gma.c: fix unsigned arithmetics | Arthur Heymans |
| 2016-10-19 | nb/gm45,x4x/gma.c: Compute p2 in VGA init instead of hardcoding it | Arthur Heymans |
| 2016-10-11 | nb/intel/*/graphic_init: use sizeof instead of hardcoding edid size | Arthur Heymans |
| 2016-10-10 | x4x/gma.c: Add VESA native resolution mode | Arthur Heymans |
| 2016-10-04 | src/northbridge: Remove unnecessary whitespace | Elyes HAOUAS |
| 2016-09-27 | nb/intel/*/gma.c: remove spaces at the fake vbt generation | Arthur Heymans |
| 2016-09-12 | src/northbridge: Improve code formatting | Elyes HAOUAS |
| 2016-09-10 | northbridge/intel/x4x: transition away from device_t | Antonello Dettori |
| 2016-09-07 | nb/intel/x4x: Correct typos in interrupt routing for PEG | Damien Zammit |
