coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-10-14	nb/intel/x4x: Place raminit definitions in raminit.h	Angel Pons
2020-09-21	src/northbridge: Drop unneeded empty lines	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-06	treewide: replace GPLv2 long form headers with SPDX header	Patrick Georgi
2020-05-06	treewide: Move "is part of the coreboot project" line in its own comment	Patrick Georgi
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2019-03-04	arch/io.h: Drop unnecessary include	Kyösti Mälkki
2018-08-10	src: Fix typo	Elyes HAOUAS
2018-05-24	nb/intel/x4x: Adapt post JEDEC for DDR3	Arthur Heymans
2018-05-24	nb/intel/x4x/raminit: Add DDR3 enhanced mode and power settings	Arthur Heymans
2018-05-24	nb/intel/x4x: Add DDR3 JEDEC init	Arthur Heymans
2018-04-17	nb/intel/x4x: Add a convenient macro to loop over bytelanes	Arthur Heymans
2018-04-17	nb/intel/x4x: Refactor setting default dll settings	Arthur Heymans