Age | Commit message (Expand) | Author |
---|---|---|
2018-05-24 | nb/intel/x4x: Adapt post JEDEC for DDR3 | Arthur Heymans |
2018-05-24 | nb/intel/x4x/raminit: Add DDR3 enhanced mode and power settings | Arthur Heymans |
2018-05-24 | nb/intel/x4x/raminit: Add DDR3 specific dra/drb settings | Arthur Heymans |
2018-05-24 | nb/intel/x4x: Implement write leveling | Arthur Heymans |
2018-05-24 | nb/intel/x4x: Add DDR3 JEDEC init | Arthur Heymans |
2018-05-14 | nb/intel/x4x/raminit: DDR3 specific ODT | Arthur Heymans |
2018-05-14 | nb/intel/x4x: Add DDR3 rcomp | Arthur Heymans |
2018-05-14 | nb/intel/x4x/raminit: Support programming initials DD3 DLL setting | Arthur Heymans |
2018-05-14 | nb/intel/x4x/raminit: Support programming DDR3 timings | Arthur Heymans |
2018-05-14 | nb/intel/x4x/raminit: Make programming launch ddr3 specific | Arthur Heymans |
2018-05-14 | nb/intel/x4x/raminit: Make programming crossclock support DDR3 | Arthur Heymans |
2018-05-14 | nb/intel/x4x: Rename a things that are not specific to DDR2 | Arthur Heymans |