summaryrefslogtreecommitdiff
path: root/src/northbridge/intel/x4x/raminit_ddr23.c
AgeCommit message (Expand)Author
2018-05-24nb/intel/x4x: Adapt post JEDEC for DDR3Arthur Heymans
2018-05-24nb/intel/x4x/raminit: Add DDR3 enhanced mode and power settingsArthur Heymans
2018-05-24nb/intel/x4x/raminit: Add DDR3 specific dra/drb settingsArthur Heymans
2018-05-24nb/intel/x4x: Implement write levelingArthur Heymans
2018-05-24nb/intel/x4x: Add DDR3 JEDEC initArthur Heymans
2018-05-14nb/intel/x4x/raminit: DDR3 specific ODTArthur Heymans
2018-05-14nb/intel/x4x: Add DDR3 rcompArthur Heymans
2018-05-14nb/intel/x4x/raminit: Support programming initials DD3 DLL settingArthur Heymans
2018-05-14nb/intel/x4x/raminit: Support programming DDR3 timingsArthur Heymans
2018-05-14nb/intel/x4x/raminit: Make programming launch ddr3 specificArthur Heymans
2018-05-14nb/intel/x4x/raminit: Make programming crossclock support DDR3Arthur Heymans
2018-05-14nb/intel/x4x: Rename a things that are not specific to DDR2Arthur Heymans