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x4x
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raminit.c
Age
Commit message (
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Author
2017-12-16
nb/x4x/raminit: Rewrite SPD decode and timing selection
Arthur Heymans
2017-07-21
sb/intel/i82801jx: Add correct PCI ids and change names
Arthur Heymans
2017-05-21
nb/intel/x4x: Make raminit less verbose with CONFIG_DEBUG_RAM_SETUP
Arthur Heymans
2017-05-04
nb/intel/x4x/raminit: Change reset type on incomplete raminit reset
Arthur Heymans
2017-03-21
nb/x4x: Move checkreset before SPD reading
Arthur Heymans
2017-03-21
nb/intel/x4x: Fix issues found by checkpatch.pl
Arthur Heymans
2017-01-22
nb/x4x/raminit: Fix programming dram timings
Arthur Heymans
2016-11-28
nb/intel/x4x/raminit: Fix DIMM_IN_CHANNEL calculation
Nico Huber
2016-11-26
nb/intel/x4x: Fix and deflate `dimm_config` in raminit
Nico Huber
2016-07-27
nb/intel/x4x: Fix CAS latency detection and max memory detection
Damien Zammit
2016-07-19
nb/intel/x4x: Fix CAS latency detection
Damien Zammit
2016-07-09
nb/intel/x4x: Fix underclocking of 800MHz DDR2 RAM
Damien Zammit
2016-06-04
nb/intel/x4x: Fix unpopulated value
Damien Zammit
2016-01-13
northbridge/intel/x4x: clean up includes
Martin Roth
2016-01-07
Correct some common spelling mistakes
Martin Roth
2015-12-30
northbridge/intel/x4x: Native raminit
Damien Zammit