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path: root/src/northbridge/intel/x4x/raminit.c
AgeCommit message (Expand)Author
2020-06-22device/smbus_host: Declare common early SMBus prototypesKyösti Mälkki
2020-06-09nb/intel/x4x: Use PCI bitwise opsAngel Pons
2020-06-06src: Remove unused 'include <cpu/x86/mtrr.h>'Elyes HAOUAS
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-06treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi
2020-05-06treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi
2020-05-01src: Remove unused 'include <cpu/x86/cache.h>'Elyes HAOUAS
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-01-09nb/intel/{i945,x4x,pineview}: Remove wrapper spd_read_byte()Kyösti Mälkki
2019-06-21nb/x4x: Rename {ddr,fsb}2{mhz,ps} as {ddr,fsb}_to_{mhz,ps}Elyes HAOUAS
2019-05-29src/northbridge: Add missing 'include <types.h>'Elyes HAOUAS
2019-05-15src/northbridge: Remove unneeded include <arch/io.h>Elyes HAOUAS
2019-05-07{gm45,pineview,sandybridge,x4x}: Use {full,system}_reset() functionElyes HAOUAS
2019-04-29nb/x4x: Use system_reset() and full_reset()Elyes HAOUAS
2019-04-06src: Use include <delay.h> when appropriateElyes HAOUAS
2019-03-27Move calls to quick_ram_check() before CBMEM initKyösti Mälkki
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-01device/pci: Fix PCI accessor headersKyösti Mälkki
2019-02-01sb/intel/common: Rename i2c_block_read() to i2c_eeprom_read()Kyösti Mälkki
2019-01-10mb: Move timestamp_add_now to northbridge x4xElyes HAOUAS
2018-12-18northbridge: Remove unneeded include <pc80/mc146818rtc.h>Elyes HAOUAS
2018-11-16src: Remove unneeded include <lib.h>Elyes HAOUAS
2018-11-12src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS
2018-11-05nb/intel/x4x/raminit: Add missing spaceJonathan Neuschäfer
2018-10-15nb/intel/x4x: Fix P45 CAPID max frequencyArthur Heymans
2018-09-16nb/intel/x4x: Don't use cached settings if CPU FSB has been changedArthur Heymans
2018-06-17nb/intel/x4x: Issue a hard reset with empty MRC cache on warm resetArthur Heymans
2018-06-14nb/intel/x4x: Work around a quirkArthur Heymans
2018-05-24nb/intel/x4x: Add DDR3 JEDEC initArthur Heymans
2018-05-14nb/intel/x4x: Rename a things that are not specific to DDR2Arthur Heymans
2018-05-14nb/x4x/raminit: Decode ddr3 dimmsArthur Heymans
2018-04-28nb/intel/x4x: Fix computing page_sizeArthur Heymans
2018-04-17nb/intel/x4x: Use SPI flash to cache raminit resultsArthur Heymans
2018-02-22device/ddr2,ddr3: Rename and move a few thingsArthur Heymans
2017-12-16nb/x4x/raminit: Rewrite SPD decode and timing selectionArthur Heymans
2017-07-21sb/intel/i82801jx: Add correct PCI ids and change namesArthur Heymans
2017-05-21nb/intel/x4x: Make raminit less verbose with CONFIG_DEBUG_RAM_SETUPArthur Heymans
2017-05-04nb/intel/x4x/raminit: Change reset type on incomplete raminit resetArthur Heymans
2017-03-21nb/x4x: Move checkreset before SPD readingArthur Heymans
2017-03-21nb/intel/x4x: Fix issues found by checkpatch.plArthur Heymans
2017-01-22nb/x4x/raminit: Fix programming dram timingsArthur Heymans
2016-11-28nb/intel/x4x/raminit: Fix DIMM_IN_CHANNEL calculationNico Huber
2016-11-26nb/intel/x4x: Fix and deflate `dimm_config` in raminitNico Huber
2016-07-27nb/intel/x4x: Fix CAS latency detection and max memory detectionDamien Zammit
2016-07-19nb/intel/x4x: Fix CAS latency detectionDamien Zammit
2016-07-09nb/intel/x4x: Fix underclocking of 800MHz DDR2 RAMDamien Zammit
2016-06-04nb/intel/x4x: Fix unpopulated valueDamien Zammit
2016-01-13northbridge/intel/x4x: clean up includesMartin Roth
2016-01-07Correct some common spelling mistakesMartin Roth
2015-12-30northbridge/intel/x4x: Native raminitDamien Zammit
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