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path: root/src/northbridge/intel/x4x/raminit.c
AgeCommit message (Expand)Author
2018-05-24nb/intel/x4x: Add DDR3 JEDEC initArthur Heymans
2018-05-14nb/intel/x4x: Rename a things that are not specific to DDR2Arthur Heymans
2018-05-14nb/x4x/raminit: Decode ddr3 dimmsArthur Heymans
2018-04-28nb/intel/x4x: Fix computing page_sizeArthur Heymans
2018-04-17nb/intel/x4x: Use SPI flash to cache raminit resultsArthur Heymans
2018-02-22device/ddr2,ddr3: Rename and move a few thingsArthur Heymans
2017-12-16nb/x4x/raminit: Rewrite SPD decode and timing selectionArthur Heymans
2017-07-21sb/intel/i82801jx: Add correct PCI ids and change namesArthur Heymans
2017-05-21nb/intel/x4x: Make raminit less verbose with CONFIG_DEBUG_RAM_SETUPArthur Heymans
2017-05-04nb/intel/x4x/raminit: Change reset type on incomplete raminit resetArthur Heymans
2017-03-21nb/x4x: Move checkreset before SPD readingArthur Heymans
2017-03-21nb/intel/x4x: Fix issues found by checkpatch.plArthur Heymans
2017-01-22nb/x4x/raminit: Fix programming dram timingsArthur Heymans
2016-11-28nb/intel/x4x/raminit: Fix DIMM_IN_CHANNEL calculationNico Huber
2016-11-26nb/intel/x4x: Fix and deflate `dimm_config` in raminitNico Huber
2016-07-27nb/intel/x4x: Fix CAS latency detection and max memory detectionDamien Zammit
2016-07-19nb/intel/x4x: Fix CAS latency detectionDamien Zammit
2016-07-09nb/intel/x4x: Fix underclocking of 800MHz DDR2 RAMDamien Zammit
2016-06-04nb/intel/x4x: Fix unpopulated valueDamien Zammit
2016-01-13northbridge/intel/x4x: clean up includesMartin Roth
2016-01-07Correct some common spelling mistakesMartin Roth
2015-12-30northbridge/intel/x4x: Native raminitDamien Zammit
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