| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-08-09 | src/northbridge: Fix typo | Elyes HAOUAS |
| 2018-06-05 | nb/intel/x4x: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-04 | nb/intel: Use postcar_frame_add_romcache() | Nico Huber |
| 2018-05-31 | {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate | Nico Huber |
| 2017-03-21 | nb/intel/x4x: Fix issues found by checkpatch.pl | Arthur Heymans |
| 2016-12-11 | intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setup | Kyösti Mälkki |
| 2016-12-11 | intel i945 gm45 x4x: Apply cbmem_top() alignment | Kyösti Mälkki |
| 2016-11-11 | intel post-car: Separate files for setup_stack_and_mtrrs() | Kyösti Mälkki |
| 2016-08-09 | x4x: add non documented vram sizes | Arthur Heymans |
| 2016-01-29 | nb/intel/x4x: Move to early cbmem | Damien Zammit |
| 2015-12-29 | northbridge/intel/x4x: Intel 4-series northbridge support | Damien Zammit |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |