| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-05-01 | nb/intel/x4x: Change memory layout to improve MTRR | Arthur Heymans |
| 2018-04-17 | nb/intel/x4x: Use SPI flash to cache raminit results | Arthur Heymans |
| 2018-01-05 | nb/intel/x4x: Disable watchdog, halt TCO timer and clear timeout | Arthur Heymans |
| 2017-07-21 | sb/intel/i82801jx: Add correct PCI ids and change names | Arthur Heymans |
| 2017-05-13 | nb/intel/x4x: Fix uninitialized variable issue | Nico Huber |
| 2017-05-09 | nb/x4x: Do not enable IGD when not supported | Arthur Heymans |
| 2017-03-21 | nb/intel/x4x: Fix issues found by checkpatch.pl | Arthur Heymans |
| 2017-02-17 | nb/intel/x4x: Implement resume from S3 suspend | Arthur Heymans |
| 2016-09-10 | northbridge/intel/x4x: transition away from device_t | Antonello Dettori |
| 2016-08-09 | x4x: make preallocated IGD memory a cmos option | Arthur Heymans |
| 2016-01-29 | nb/intel/x4x: Tidy up northbridge | Damien Zammit |
| 2016-01-13 | northbridge/intel/x4x: clean up includes | Martin Roth |
| 2015-12-29 | northbridge/intel/x4x: Intel 4-series northbridge support | Damien Zammit |
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index : coreboot.git | |
| my copy of coreboot | gitea |
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