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path: root/src/northbridge/intel/sandybridge
AgeCommit message (Expand)Author
2016-09-27northbridge/sandybridge/raminit_mrc.c: fix missing includeMatt DeVillier
2016-09-27nb/intel/*/gma.c: remove spaces at the fake vbt generationArthur Heymans
2016-09-04northbridge/intel/sandybridge: transition away from device_tAntonello Dettori
2016-08-31northbridge/intel: Add required space before opening parenthesis '('Elyes HAOUAS
2016-08-01Remove non-ascii & unprintable charactersMartin Roth
2016-07-31src/northbridge: Capitalize CPU, RAM and ROMElyes HAOUAS
2016-07-28bootmode: Get rid of CONFIG_BOOTMODE_STRAPSFurquan Shaikh
2016-07-26intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZEKyösti Mälkki
2016-07-07intel/sandybridge: read correct leaf for cpu familyRyan Salsamendi
2016-06-23intel/sandybridge: Fix builds with System Agent blobKyösti Mälkki
2016-06-22intel/model_206ax: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki
2016-06-20nb/intel/sandybridge/raminit: Use supported CASPatrick Rudolph
2016-06-20nb/intel/sandybridge/raminit: Do code cleanupPatrick Rudolph
2016-06-20nb/intel/sandybridge/raminit: Do code cleanupPatrick Rudolph
2016-06-20nb/intel/sandybridge/raminit: Allow 933Mhz on Lenovo devicesPatrick Rudolph
2016-06-17intel/model_206ax: Move platform specific definesKyösti Mälkki
2016-06-17Move definitions of HIGH_MEMORY_SAVEKyösti Mälkki
2016-06-12nb/intel/raminit (native): Read PCI mmio size from devicetreePatrick Rudolph
2016-06-12nb/intel: Factor out common MRC codePatrick Rudolph
2016-05-31Fix leaking CONFIG_VGA=yKyösti Mälkki
2016-05-04nb/intel/sandybridge/raminit: support calling dram_freq multiple timesPatrick Rudolph
2016-05-04nb/intel/sandybridge/raminit: add additional fallbacksPatrick Rudolph
2016-04-29nb/intel/sandybridge/raminit: fix regression "always use mrccache"Patrick Rudolph
2016-04-10nb/intel/sandybridge/raminit: always use mrccachePatrick Rudolph
2016-04-05nb/intel/sandybridge/raminit: die in toplevel functionPatrick Rudolph
2016-04-05nb/intel/sandybridge/raminit: prepare raminit for fallbackPatrick Rudolph
2016-03-30nb/intel/sandybridge/raminit: move ram training into seperate functionPatrick Rudolph
2016-03-29nb/intel/sandybridge/raminit: move dimm_info into ramctr_timingPatrick Rudolph
2016-03-11northbridge/intel: move mrccache.c of sandybridge + haswell to commonAlexander Couzens
2016-03-11northbridge/intel: move mrc_cache definition into a common headerAlexander Couzens
2016-03-11nortbridge/sandybridge/mrccache: parse the return code of flash->writeAlexander Couzens
2016-03-05sandybridge/gma_lvds: support both Sandy&Ivy on one boardIru Cai
2016-03-03nb/intel/sandybridge/raminit: Fill SMBIOS type17 infoPatrick Rudolph
2016-03-02nb/intel/sandybridge/romstage: Read fuse bits for max MEM ClkPatrick Rudolph
2016-03-02nb/intel/sandybridge/raminit: Make discover_timC_write non cyclicPatrick Rudolph
2016-02-28northbridge/intel: add missing #include guardsIru Cai
2016-02-26nb/intel/sandybridge/raminit: Adjust timB to prevent overflowPatrick Rudolph
2016-02-26tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))"Denis 'GNUtoo' Carikli
2016-02-20nb/intel/sandybridge/raminit: Add XMP supportPatrick Rudolph
2016-02-19nb/intel/sandybridge/raminit: Improve loggingPatrick Rudolph
2016-02-18nb/intel/sandybridge: Start PEG link trainingPatrick Rudolph
2016-02-18southbridge/intel/bd82x6x: Use common gpio.cPatrick Rudolph
2016-02-16nb/intel/sandybridge/raminit: Add shift offsetPatrick Rudolph
2016-02-13sandybridge: Always include MRC if not using native RAM init.Vladimir Serbinenko
2016-02-12Make MRC vs native a config rather than making a separate chipset for it.Vladimir Serbinenko
2016-02-12Merge sandy/ivybridge romstage flow for MRC and non-MRC.Vladimir Serbinenko
2016-02-10Kconfig: Move defaults for CBFS_SIZEMartin Roth
2016-02-09sandybridge: Set all native gfx-related options in northbridge code.Vladimir Serbinenko
2016-02-09ivy: Add a possiblity for mainboard early init.Vladimir Serbinenko
2016-02-09Revert "northbridge/intel/peg: Disable unused ports"Nico Huber
2016-02-04northbridge/intel/peg: Disable unused portsPatrick Rudolph
2016-02-04nb/intel/sandybridge/raminit: Fix two dimms per channelPatrick Rudolph
2016-01-29Revert "northbridge/intel/sandybridge: Fix random raminit failures"Vladimir Serbinenko
2016-01-17intel/sandybridge/raminit: fix ODT settingPatrick Rudolph
2016-01-13intel/northbridge/sandy: raminit code cleanupPatrick Rudolph
2015-12-16northbridge/intel ACPI: Remove unused Local methodMartin Roth
2015-12-15x86 acpi: remove ALIGN_CURRENT macroAaron Durbin
2015-11-19nb/intel/sandybridge/raminit: Factor out code into toggle_io_resetPatrick Rudolph
2015-11-19nb/intel/sandybridge/raminit: Comment the codePatrick Rudolph
2015-11-18nb/intel/sandybridge: Fix PEG disablementPatrick Rudolph
2015-11-18nb/intel/sandybridge/northbridge: Initialize uma_memory_base in all casesPatrick Rudolph
2015-11-18northbridge/intel/sandybridge: Fix random raminit failuresPatrick Rudolph
2015-11-05nb/intel/sandybridge: Limit GFX workaround to Sandy BridgeNico Huber
2015-11-04nb/intel/sandybridge: Add ACPI DMAR tableNico Huber
2015-11-04nb/intel/sandybridge: Enable basic IOMMU supportNico Huber
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-29nb/intel/sandybridge/gma: add disable functionPatrick Rudolph
2015-10-23Intel: Move MCRS ResourceTemplate outside of _CRS methodMartin Roth
2015-10-12gma: Consolidate Intel IGD ACPI code some moreNico Huber
2015-10-11Kill lvds_num_lanesVladimir Serbinenko
2015-10-11Derive lvds_dual_channel from EDID timings.Vladimir Serbinenko
2015-10-09nb/intel/sandybridge/raminit: Add edge write discovery checkPatrick Rudolph
2015-10-09northbridge/intel/sandybridge: Do not disable PEG by defaultPatrick Rudolph
2015-10-09northbridge/intel/sandybridge: Enable PEG clock-gating on demandPatrick Rudolph
2015-10-03sandybridge ivybridge: Treat native init as first class citizenAlexandru Gagniuc
2015-09-24coreboot: move TS_END_ROMSTAGE to one spotAaron Durbin
2015-09-07intel/sandybridge: Do not guard native VGA init by #ifdefsAlexandru Gagniuc
2015-09-07north/intel/sandybridge: Fix native VGA initializationAlexandru Gagniuc
2015-09-07intel: Do not hardcode the position of mrc.cacheAlexandru Gagniuc
2015-09-04bootstate: remove need for #ifdef ENV_RAMSTAGEAaron Durbin
2015-08-28edid: Use edid_mode struct to reduce redundancyDavid Hendricks
2015-08-25Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in KconfigMartin Roth
2015-07-22intel raminit: rewrite timB high adjust calculationPatrick Rudolph
2015-07-22intel raminit: support two DIMMs per channelPatrick Rudolph
2015-07-14intel/sandybridge/gma: Add graphics PCI Device IDs 0x0162 and 0x0152Damien Zammit
2015-07-13x86: flatten hierarchyStefan Reinauer
2015-07-13intel raminit: improve loggingPatrick Rudolph
2015-07-13intel raminit: fix timB high adjust calculationPatrick Rudolph
2015-07-13intel raminit: whitespace fixesPatrick Rudolph
2015-07-13intel sandybridge: add VGA pci device idPatrick Rudolph
2015-07-07sandybridge: provide monotonic timer functionPatrick Georgi
2015-07-06Revert "sandy/ivybridge: use LAPIC timer in SMM"Patrick Georgi
2015-07-04intel raminit: rename registerPatrick Rudolph
2015-07-02sandy/ivybridge: use LAPIC timer in SMMStefan Reinauer
2015-06-30intel/sandybridge: initialize variablePatrick Georgi
2015-06-28intel raminit: check correct registers in channel_testPatrick Rudolph
2015-06-28intel raminit: properly handle DDR3 DIMMs with address mirroringPatrick Rudolph
2015-06-23Kconfig: Move CBFS_SIZE into Mainboard menuMartin Roth
2015-06-09Create i945-ivy smm tseg init based on ivy code.Vladimir Serbinenko
2015-06-08Remove empty lines at end of fileElyes HAOUAS
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