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Author
2016-03-02
nb/intel/sandybridge/romstage: Read fuse bits for max MEM Clk
Patrick Rudolph
2016-02-12
Merge sandy/ivybridge romstage flow for MRC and non-MRC.
Vladimir Serbinenko
2015-11-04
nb/intel/sandybridge: Add ACPI DMAR table
Nico Huber
2015-11-04
nb/intel/sandybridge: Enable basic IOMMU support
Nico Huber
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-06-09
Create i945-ivy smm tseg init based on ivy code.
Vladimir Serbinenko
2015-05-28
Migrate 206ax to SMM_MODULES
Vladimir Serbinenko
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-02-15
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
Kevin Paul Herbert
2015-01-06
northbridge/intel: Do not define include guard as 1
Edward O'Callaghan
2014-10-16
sandybridge: Move common northbridge finalize to northbridge code.
Vladimir Serbinenko
2014-10-11
acpi: Remove explicit pointer tracking in per-device ssdt.
Vladimir Serbinenko
2014-09-11
Move nehalem/sandy/ivy to per-device acpi
Vladimir Serbinenko
2013-05-01
boot: remove cbmem_post_handling()
Aaron Durbin
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2012-11-12
Initial IGD OpRegion implementation
Stefan Reinauer
2012-11-12
Avoid using hardcoded values in MRC cache code
Vadim Bendebury
2012-07-24
Make ACPI code detect Sandy/Ivy Bridge dynamically
Stefan Reinauer
2012-05-11
Rework Sandybridge MRC cache handling
Stefan Reinauer
2012-05-02
Sandybridge: Display platform information early
Vadim Bendebury
2012-05-01
Fix Sandybridge/Ivybridge mainboards according to code review
Stefan Reinauer
2012-04-05
Add support for Intel Sandybridge CPU (northbridge part)
Stefan Reinauer