| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-10-03 | sandybridge ivybridge: Treat native init as first class citizen | Alexandru Gagniuc |
| 2015-09-24 | coreboot: move TS_END_ROMSTAGE to one spot | Aaron Durbin |
| 2015-05-27 | sandybridge native: Add call to TPM code. | Vladimir Serbinenko |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-02-17 | sandybridge/raminit: Get max mem clock from devicetree | Alexandru Gagniuc |
| 2014-11-30 | Replace hlt() loops with halt() | Patrick Georgi |
| 2014-11-23 | sandy/ivy/nehalem: Remerge interrupt handling | Vladimir Serbinenko |
| 2014-10-24 | sandy/ivy native: dedup romstage.c main() | Vladimir Serbinenko |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
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