index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
northbridge
/
intel
/
sandybridge
/
raminit.c
Age
Commit message (
Expand
)
Author
2018-07-29
sandybridge/raminit: use MCHBAR32 macro everywhere
Felix Held
2018-07-29
nb/intel/sandybridge: Bump MRC_CACHE_VERSION
Patrick Rudolph
2018-07-28
nb/intel/sandybridge/report_platform: Move remaining code to sb folder
Patrick Rudolph
2018-07-28
intel/sandybridge: Don't hardcode platform type
Patrick Rudolph
2018-07-26
nb/intel/sandybridge/raminit: Fix SMBIOS 17 bus width
Patrick Rudolph
2018-01-26
nb/intel/sandybridge: Use common mrc cache functions
Arthur Heymans
2017-10-19
nb/sandybridge: Add a kconfig option to ignore XMP max DIMMs
Vagiz Trakhanov
2017-09-27
nb/intel/sandybridge/raminit: Improve readability
Patrick Rudolph
2017-08-06
sb/intel/*: Use common SMBus functions
Arthur Heymans
2017-06-08
nb/intel/sandybridge/raminit: Advertise correct frequency
Patrick Rudolph
2017-04-07
nb/intel/sandybridge/raminit: Always run quick_ram_check
Patrick Rudolph
2016-12-16
nb/intel/sandybridge/raminit: Separate Sandybridge and Ivybridge
Patrick Rudolph
2016-12-06
intel PCI ops: Remove explicit PCI MMCONF access
Kyösti Mälkki
2016-12-05
nb/intel/sandybridge/raminit: Split raminit.c
Patrick Rudolph
2016-11-29
nb/intel/sandybridge/raminit: Support CL > 11
Patrick Rudolph
2016-11-28
nb/intel/sandybridge/raminit: Reset internal state on fallback attempts
Patrick Rudolph
2016-11-22
nb/intel/sandybridge/raminit: Do not log inside busy-wait loop
Kyösti Mälkki
2016-11-21
nb/intel: Fix some spelling mistakes in comments and strings
Martin Roth
2016-11-20
intel sandy/ivy: Improve DIMM replacement detection
Kyösti Mälkki
2016-11-20
intel sandy/ivy: Skip SPD loading on S3 resume path
Kyösti Mälkki
2016-11-20
intel sandy/ivy: Move SPD loading after TS_BEFORE_INITRAM
Kyösti Mälkki
2016-11-20
intel sandy/ivy: Change CRC used to detect DIMM replacement
Kyösti Mälkki
2016-11-20
nb/intel/sandybridge/raminit: Fix disable_channel
Patrick Rudolph
2016-11-20
nb/intel/sandybridge/raminit: Find CMD rate per channel
Patrick Rudolph
2016-11-20
nb/intel/sandybridge/raminit: Define registers
Patrick Rudolph
2016-11-20
nb/intel/sandybridge/raminit: Get rid of fallback attempts
Patrick Rudolph
2016-11-20
nb/intel/sandybridge/raminit: Fix CAS Write Latency
Patrick Rudolph
2016-10-04
src/northbridge: Remove unnecessary whitespace
Elyes HAOUAS
2016-10-04
src/northbridge: Remove whitespace after sizeof
Elyes HAOUAS
2016-08-31
northbridge/intel: Add required space before opening parenthesis '('
Elyes HAOUAS
2016-07-31
src/northbridge: Capitalize CPU, RAM and ROM
Elyes HAOUAS
2016-07-07
intel/sandybridge: read correct leaf for cpu family
Ryan Salsamendi
2016-06-20
nb/intel/sandybridge/raminit: Use supported CAS
Patrick Rudolph
2016-06-20
nb/intel/sandybridge/raminit: Do code cleanup
Patrick Rudolph
2016-06-20
nb/intel/sandybridge/raminit: Do code cleanup
Patrick Rudolph
2016-06-20
nb/intel/sandybridge/raminit: Allow 933Mhz on Lenovo devices
Patrick Rudolph
2016-06-12
nb/intel/raminit (native): Read PCI mmio size from devicetree
Patrick Rudolph
2016-06-12
nb/intel: Factor out common MRC code
Patrick Rudolph
2016-05-04
nb/intel/sandybridge/raminit: support calling dram_freq multiple times
Patrick Rudolph
2016-05-04
nb/intel/sandybridge/raminit: add additional fallbacks
Patrick Rudolph
2016-04-29
nb/intel/sandybridge/raminit: fix regression "always use mrccache"
Patrick Rudolph
2016-04-10
nb/intel/sandybridge/raminit: always use mrccache
Patrick Rudolph
2016-04-05
nb/intel/sandybridge/raminit: die in toplevel function
Patrick Rudolph
2016-04-05
nb/intel/sandybridge/raminit: prepare raminit for fallback
Patrick Rudolph
2016-03-30
nb/intel/sandybridge/raminit: move ram training into seperate function
Patrick Rudolph
2016-03-29
nb/intel/sandybridge/raminit: move dimm_info into ramctr_timing
Patrick Rudolph
2016-03-11
northbridge/intel: move mrc_cache definition into a common header
Alexander Couzens
2016-03-03
nb/intel/sandybridge/raminit: Fill SMBIOS type17 info
Patrick Rudolph
2016-03-02
nb/intel/sandybridge/romstage: Read fuse bits for max MEM Clk
Patrick Rudolph
2016-03-02
nb/intel/sandybridge/raminit: Make discover_timC_write non cyclic
Patrick Rudolph
2016-02-26
nb/intel/sandybridge/raminit: Adjust timB to prevent overflow
Patrick Rudolph
2016-02-20
nb/intel/sandybridge/raminit: Add XMP support
Patrick Rudolph
2016-02-19
nb/intel/sandybridge/raminit: Improve logging
Patrick Rudolph
2016-02-16
nb/intel/sandybridge/raminit: Add shift offset
Patrick Rudolph
2016-02-12
Merge sandy/ivybridge romstage flow for MRC and non-MRC.
Vladimir Serbinenko
2016-02-04
nb/intel/sandybridge/raminit: Fix two dimms per channel
Patrick Rudolph
2016-01-29
Revert "northbridge/intel/sandybridge: Fix random raminit failures"
Vladimir Serbinenko
2016-01-17
intel/sandybridge/raminit: fix ODT setting
Patrick Rudolph
2016-01-13
intel/northbridge/sandy: raminit code cleanup
Patrick Rudolph
2015-11-19
nb/intel/sandybridge/raminit: Factor out code into toggle_io_reset
Patrick Rudolph
2015-11-19
nb/intel/sandybridge/raminit: Comment the code
Patrick Rudolph
2015-11-18
northbridge/intel/sandybridge: Fix random raminit failures
Patrick Rudolph
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-09
nb/intel/sandybridge/raminit: Add edge write discovery check
Patrick Rudolph
2015-10-09
northbridge/intel/sandybridge: Enable PEG clock-gating on demand
Patrick Rudolph
2015-10-03
sandybridge ivybridge: Treat native init as first class citizen
Alexandru Gagniuc
2015-06-02
cbfs: new API and better program loading
Aaron Durbin
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-04-01
cbfs: correct types used for accessing files
Aaron Durbin
2014-12-02
Replace hlt with halt()
Patrick Georgi
2014-06-25
nehalem sandy ivy: Check cbmem_add() result for MRC data
Kyösti Mälkki
2014-05-01
Declare recovery and developer modes outside ChromeOS
Kyösti Mälkki
2014-04-09
console: Move newline translation outside console_tx_byte
Kyösti Mälkki
2014-03-04
console: Fix includes
Kyösti Mälkki
2014-01-15
Intel (sandy/ivy): Avoid calling cbmem_initialize() twice
Kyösti Mälkki
2014-01-15
CBMEM intel: Define get_top_of_ram() once per chipset
Kyösti Mälkki
2014-01-12
sandybridge: Use calls rather than asm to call to MRC.
Vladimir Serbinenko
2014-01-12
lib/cbfs_core.c: Supply size of file as well in cbfs_get_file_content
Vladimir Serbinenko
2013-12-23
usbdebug: Add option to disable console for romstage
Kyösti Mälkki
2013-10-14
Revert "CBMEM: Always have early initialisation"
Kyösti Mälkki
2013-09-21
CBMEM: Always have early initialisation
Kyösti Mälkki
2013-09-11
CBMEM x86: Unify get_cbmem_toc()
Kyösti Mälkki
2013-07-10
usbdebug: Move ehci_debug_info allocation
Kyösti Mälkki
2013-03-22
x86: Unify arch/io.h and arch/romcc_io.h
Stefan Reinauer
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2013-01-30
Extend CBFS to support arbitrary ROM source media.
Hung-Te Lin
2012-11-14
Sandybridge: Set PEG clock gating
Marc Jones
2012-11-14
Provide MRC with a console printing callback function
Vadim Bendebury
2012-11-07
Add missing newline in error message
Stefan Reinauer
2012-11-07
CMOS: Move MRC seed offset into upper bank
Duncan Laurie
2012-07-30
sandybridge: reinitialize usbdebug after MRC
Sven Schnelle
2012-07-25
More descriptive error messages in Sandybridge raminit code
Stefan Reinauer
2012-05-11
Rework Sandybridge MRC cache handling
Stefan Reinauer
2012-05-03
Add missing newline to printk in Sandybridge init code
Stefan Reinauer
2012-05-02
Sandybridge: Display platform information early
Vadim Bendebury
2012-05-01
Only send ME Dram Init Done message on Sandybridge
Duncan Laurie
2012-04-30
Sandybridge: Temporarily disable MRC cache finding code
Stefan Reinauer
2012-04-05
Add support for Intel Sandybridge CPU (northbridge part)
Stefan Reinauer