coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-03-04	arch/io.h: Drop unnecessary include	Kyösti Mälkki
2019-03-01	device/pci: Fix PCI accessor headers	Kyösti Mälkki
2018-09-28	src/*: normalize Google copyright headers	Patrick Georgi
2018-06-05	cpu/intel/model_206ax: Switch to POSTCAR_STAGE	Arthur Heymans
2018-06-04	nb/intel: Use postcar_frame_add_romcache()	Nico Huber
2018-05-31	{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate	Nico Huber
2016-12-09	intel/sandybridge: Use postcar_frame for MTRR setup	Kyösti Mälkki
2016-12-06	CPU: Declare cpu_phys_address_size() for all arch	Kyösti Mälkki
2016-11-18	intel/sandybridge post-car: Redo MTRR settings and stack selection	Kyösti Mälkki
2016-11-11	intel post-car: Separate files for setup_stack_and_mtrrs()	Kyösti Mälkki
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-01-27	CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEM	Kyösti Mälkki
2014-01-15	CBMEM intel: Define get_top_of_ram() once per chipset	Kyösti Mälkki