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path: root/src/northbridge/intel/sandybridge/northbridge.c
AgeCommit message (Expand)Author
2018-11-16src: Remove unneeded include <cbmem.h>Elyes HAOUAS
2018-09-25northbridge: Use 'unsigned int' to bare use of 'unsigned'Elyes HAOUAS
2018-08-01nb/intel/sandybridge: Don't use PCI operations on the pci_domain deviceArthur Heymans
2018-07-30nb/intel/gm45: Use common code for SMM in TSEGArthur Heymans
2018-06-04northbridge/intel: Remove unneeded includesElyes HAOUAS
2018-05-08{mb,nb,soc}: Remove references to pci_bus_default_ops()Nico Huber
2018-04-30nb/intel/sandybridge: Get rid of device_tElyes HAOUAS
2018-04-11Revert "model_206ax: Use parallel MP init"Arthur Heymans
2018-04-11model_206ax: Use parallel MP initArthur Heymans
2017-10-16nb/intel: Add Ivy Bridge Server (Xeon-E3v2) PCI IDsVagiz Trakhanov
2017-09-14device: acpi_name() should take a const struct deviceAaron Durbin
2017-06-27nb/intel: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
2017-06-27nb/intel/sandybridge: Fill in acpi_namePatrick Rudolph
2017-05-19nb/intel/sandybridge: Hide additional nb devicesPatrick Rudolph
2017-01-06nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h>Arthur Heymans
2016-12-07MMCONF_SUPPORT: Drop redundant loggingKyösti Mälkki
2016-12-07MMCONF_SUPPORT: Consolidate resource registrationKyösti Mälkki
2016-11-18intel/sandybridge: Use romstage_handoff for S3Kyösti Mälkki
2016-10-11cpu/intel/smm: Use CONFIG_SMM_TSEG_SIZENico Huber
2016-02-09Revert "northbridge/intel/peg: Disable unused ports"Nico Huber
2016-02-04northbridge/intel/peg: Disable unused portsPatrick Rudolph
2015-11-18nb/intel/sandybridge: Fix PEG disablementPatrick Rudolph
2015-11-18nb/intel/sandybridge/northbridge: Initialize uma_memory_base in all casesPatrick Rudolph
2015-11-05nb/intel/sandybridge: Limit GFX workaround to Sandy BridgeNico Huber
2015-11-04nb/intel/sandybridge: Add ACPI DMAR tableNico Huber
2015-11-04nb/intel/sandybridge: Enable basic IOMMU supportNico Huber
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-09northbridge/intel/sandybridge: Enable PEG clock-gating on demandPatrick Rudolph
2015-06-09Create i945-ivy smm tseg init based on ivy code.Vladimir Serbinenko
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2014-11-01northbridge/intel: Use DEVICE_NOOP macro over dummy symbolEdward O'Callaghan
2014-10-29intel/sandybridge: Add PCI ID for northbridge 0x150Damien Zammit
2014-10-11acpi: Remove explicit pointer tracking in per-device ssdt.Vladimir Serbinenko
2014-09-11Move nehalem/sandy/ivy to per-device acpiVladimir Serbinenko
2014-06-18northbridge/intel: Drop use of set_top_of_ram()Kyösti Mälkki
2014-05-19intel: Remove GFXUMA and related global variablesKyösti Mälkki
2014-05-14intel: Drop obsolete comments on MTRR usageKyösti Mälkki
2014-02-25Remove CACHE_ROM.Vladimir Serbinenko
2014-01-15CBMEM intel: Define get_top_of_ram() once per chipsetKyösti Mälkki
2013-09-11CBMEM x86: Unify get_cbmem_toc()Kyösti Mälkki
2013-09-11CBMEM: Unify get_top_of_ram()Kyösti Mälkki
2013-09-11CBMEM northbridges: Remove references to global high_tables_baseKyösti Mälkki
2013-07-10Fix MMCONF_SUPPORT_DEFAULT for ramstageKyösti Mälkki
2013-06-22intel/sandybridge: Locate CBMEM TOC early in ramstageKyösti Mälkki
2013-05-01boot: remove cbmem_post_handling()Aaron Durbin
2013-04-03sandybridge: enable ROM cachingAaron Durbin
2013-03-23resources: introduce reserved_ram_resource()Aaron Durbin
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2013-02-28Drop CONFIG_WRITE_HIGH_TABLESStefan Reinauer
2013-02-14sconfig: rename lapic_cluster -> cpu_clusterStefan Reinauer
2013-02-14sconfig: rename pci_domain -> domainStefan Reinauer
2012-11-28Remove assembly coded log2 functionRonald G. Minnich
2012-08-08Cleanup coreboot memory table includesKyösti Mälkki
2012-08-07Sandy/Ivy Bridge and Cougar/Panther Point: Fix namesStefan Reinauer
2012-08-01Intel and GFXUMA: drop redundant use of lb_add_memory_range()Kyösti Mälkki
2012-08-01Intel Sandybridge and UMA: use mmio_resource()Kyösti Mälkki
2012-08-01Intel Sandybridge: add reserved memory as resourcesKyösti Mälkki
2012-07-24Ivybridge: fix workaround and enable PAIRDuncan Laurie
2012-07-24CPU: Add basic support for Nominal Configurable TDPDuncan Laurie
2012-07-24SandyBridge: Add another PCI device ID for northbridgeWalter Murphy
2012-07-16Define global uma_memory variablesKyösti Mälkki
2012-05-11Hook up MRC cache updateStefan Reinauer
2012-05-11Rework Sandybridge MRC cache handlingStefan Reinauer
2012-05-08Clean up #ifsPatrick Georgi
2012-05-01Modify DMI init for IvyBridgeVincent Palatin
2012-04-05Add support for Intel Sandybridge CPU (northbridge part)Stefan Reinauer
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