Age | Commit message (Expand) | Author |
2024-01-31 | include/device/device.h: Remove CHIP_NAME() macro | Nicholas Sudsgaard |
2023-11-18 | nb/intel/sandybridge: assign host bridge ops in chipset devicetree | Felix Held |
2023-10-20 | device/device.h: Rename pci_domain_scan_bus | Arthur Heymans |
2022-12-01 | cpu/intel/model_206ax: Remove fake lapic device | Arthur Heymans |
2022-11-30 | nb/intel/sandybridge: Hook up CPU bus and PCI domain ops to devicetree | Arthur Heymans |
2022-08-26 | nb/intel/sandybridge: Align TOUUD down to 1 MiB granularity | Arthur Heymans |
2022-07-05 | nb,soc/intel: Handle upper RAM boundary | Kyösti Mälkki |
2022-06-30 | nb/intel: Drop local legacy_hole definitions | Kyösti Mälkki |
2022-06-22 | device/resource: Add _kb postfix for resource allocators | Kyösti Mälkki |
2022-03-28 | nb/intel/sandybridge/acpi: Support setting PCI bars above 4G | Arthur Heymans |
2022-03-07 | src: Make PCI ID define names shorter | Felix Singer |
2021-11-26 | nb/intel/sandybridge: Add support for DPR | Michał Żygowski |
2021-04-10 | nb/intel: Replace remaining BAR accessors | Angel Pons |
2021-04-10 | nb/intel/sandybridge: Use new fixed BAR accessors | Angel Pons |
2021-02-16 | nb,soc/intel: Switch to CHROMEOS_RAMOOPS_DYNAMIC | Kyösti Mälkki |
2021-02-16 | nb/intel/sandybridge,haswell: Use chromeos_reserve_ram_oops() | Kyösti Mälkki |
2021-01-30 | nb/intel/sandybridge: Define and use MMCONF_BUS_NUMBER | Angel Pons |
2021-01-25 | nb/intel/sandybridge: Correct late DMI init sequence | Angel Pons |
2020-12-12 | nb/intel/sandybridge: Clean up stepping logic | Angel Pons |
2020-09-21 | nb/intel/sandybridge: Clean up DMIBAR/EPBAR registers | Angel Pons |
2020-08-06 | nb/intel/sandybridge: Deduplicate PCIEXBAR decoding | Angel Pons |
2020-08-06 | nb/intel/sandybridge: Refactor `get_pcie_bar` | Angel Pons |
2020-06-06 | src: Use pci_dev_ops_pci where applicable | Angel Pons |
2020-05-19 | nb/intel/sandybridge: Do not hardcode resource indices | Angel Pons |
2020-05-14 | nb/intel/sandybridge: add resources during read_resources() | Aaron Durbin |
2020-05-12 | device/pci_device: Extract pci_domain_set_resources from SOC | Raul E Rangel |
2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
2020-05-02 | acpi: Move ACPI table support out of arch/x86 (3/5) | Furquan Shaikh |
2020-04-10 | Replace DEVICE_NOOP with noop_(set|read)_resources | Nico Huber |
2020-04-10 | Drop unnecessary DEVICE_NOOP entries | Nico Huber |
2020-04-05 | Drop explicit NULL initializations from `device_operations` | Elyes HAOUAS |
2020-04-02 | Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator` | Nico Huber |
2020-03-25 | nb/intel/sandybridge: Use SPDX headers | Angel Pons |
2020-03-20 | nb/intel/sandybridge: Always write to PEGCTL | Angel Pons |
2020-03-18 | nb/intel/sandybridge: Tidy up code and comments | Angel Pons |
2020-03-17 | src (minus soc and mainboard): Remove copyright notices | Patrick Georgi |
2020-02-18 | nb/intel/sandybridge: Add Xeon E3-1200 (v1) hostbridge PCI ID | Jonathan A. Kollasch |
2020-02-18 | nb/intel/sandybridge: use list of northbridge device IDs | Jonathan A. Kollasch |
2020-01-10 | nb/intel/sandybridge: Add a bunch of MCHBAR defines | Angel Pons |
2019-12-19 | src/northbridge: Remove unused <stdlib.h> | Elyes HAOUAS |
2019-12-12 | nb/{haswell,i945,sandybridge}: Drop outdated comment | Elyes HAOUAS |
2019-10-28 | src: Remove unused '#include <cpu/cpu.h>' | Elyes HAOUAS |
2019-08-15 | intel/smm/gen1: Rename header file | Kyösti Mälkki |
2019-08-15 | cpu/intel: Replace bsp_init_and_start_aps() | Kyösti Mälkki |
2019-08-07 | intel/nehalem,sandybridge: Move stage_cache support function | Kyösti Mälkki |
2019-03-21 | {northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem() | Subrata Banik |
2019-03-20 | src: Use 'include <string.h>' when appropriate | Elyes HAOUAS |
2019-03-08 | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner |
2019-03-04 | arch/io.h: Drop unnecessary include | Kyösti Mälkki |
2019-03-01 | device/pci: Fix PCI accessor headers | Kyösti Mälkki |
2019-01-22 | cpu/intel/model_206ax: Use parallel MP init | Arthur Heymans |
2019-01-06 | device: Use pcidev_on_root() | Kyösti Mälkki |
2018-11-16 | src: Remove unneeded include <cbmem.h> | Elyes HAOUAS |
2018-09-25 | northbridge: Use 'unsigned int' to bare use of 'unsigned' | Elyes HAOUAS |
2018-08-01 | nb/intel/sandybridge: Don't use PCI operations on the pci_domain device | Arthur Heymans |
2018-07-30 | nb/intel/gm45: Use common code for SMM in TSEG | Arthur Heymans |
2018-06-04 | northbridge/intel: Remove unneeded includes | Elyes HAOUAS |
2018-05-08 | {mb,nb,soc}: Remove references to pci_bus_default_ops() | Nico Huber |
2018-04-30 | nb/intel/sandybridge: Get rid of device_t | Elyes HAOUAS |
2018-04-11 | Revert "model_206ax: Use parallel MP init" | Arthur Heymans |
2018-04-11 | model_206ax: Use parallel MP init | Arthur Heymans |
2017-10-16 | nb/intel: Add Ivy Bridge Server (Xeon-E3v2) PCI IDs | Vagiz Trakhanov |
2017-09-14 | device: acpi_name() should take a const struct device | Aaron Durbin |
2017-06-27 | nb/intel: add IS_ENABLED() around Kconfig symbol references | Martin Roth |
2017-06-27 | nb/intel/sandybridge: Fill in acpi_name | Patrick Rudolph |
2017-05-19 | nb/intel/sandybridge: Hide additional nb devices | Patrick Rudolph |
2017-01-06 | nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h> | Arthur Heymans |
2016-12-07 | MMCONF_SUPPORT: Drop redundant logging | Kyösti Mälkki |
2016-12-07 | MMCONF_SUPPORT: Consolidate resource registration | Kyösti Mälkki |
2016-11-18 | intel/sandybridge: Use romstage_handoff for S3 | Kyösti Mälkki |
2016-10-11 | cpu/intel/smm: Use CONFIG_SMM_TSEG_SIZE | Nico Huber |
2016-02-09 | Revert "northbridge/intel/peg: Disable unused ports" | Nico Huber |
2016-02-04 | northbridge/intel/peg: Disable unused ports | Patrick Rudolph |
2015-11-18 | nb/intel/sandybridge: Fix PEG disablement | Patrick Rudolph |
2015-11-18 | nb/intel/sandybridge/northbridge: Initialize uma_memory_base in all cases | Patrick Rudolph |
2015-11-05 | nb/intel/sandybridge: Limit GFX workaround to Sandy Bridge | Nico Huber |
2015-11-04 | nb/intel/sandybridge: Add ACPI DMAR table | Nico Huber |
2015-11-04 | nb/intel/sandybridge: Enable basic IOMMU support | Nico Huber |
2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
2015-10-09 | northbridge/intel/sandybridge: Enable PEG clock-gating on demand | Patrick Rudolph |
2015-06-09 | Create i945-ivy smm tseg init based on ivy code. | Vladimir Serbinenko |
2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
2014-11-01 | northbridge/intel: Use DEVICE_NOOP macro over dummy symbol | Edward O'Callaghan |
2014-10-29 | intel/sandybridge: Add PCI ID for northbridge 0x150 | Damien Zammit |
2014-10-11 | acpi: Remove explicit pointer tracking in per-device ssdt. | Vladimir Serbinenko |
2014-09-11 | Move nehalem/sandy/ivy to per-device acpi | Vladimir Serbinenko |
2014-06-18 | northbridge/intel: Drop use of set_top_of_ram() | Kyösti Mälkki |
2014-05-19 | intel: Remove GFXUMA and related global variables | Kyösti Mälkki |
2014-05-14 | intel: Drop obsolete comments on MTRR usage | Kyösti Mälkki |
2014-02-25 | Remove CACHE_ROM. | Vladimir Serbinenko |
2014-01-15 | CBMEM intel: Define get_top_of_ram() once per chipset | Kyösti Mälkki |
2013-09-11 | CBMEM x86: Unify get_cbmem_toc() | Kyösti Mälkki |
2013-09-11 | CBMEM: Unify get_top_of_ram() | Kyösti Mälkki |
2013-09-11 | CBMEM northbridges: Remove references to global high_tables_base | Kyösti Mälkki |
2013-07-10 | Fix MMCONF_SUPPORT_DEFAULT for ramstage | Kyösti Mälkki |
2013-06-22 | intel/sandybridge: Locate CBMEM TOC early in ramstage | Kyösti Mälkki |
2013-05-01 | boot: remove cbmem_post_handling() | Aaron Durbin |
2013-04-03 | sandybridge: enable ROM caching | Aaron Durbin |
2013-03-23 | resources: introduce reserved_ram_resource() | Aaron Durbin |
2013-03-01 | GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« | Paul Menzel |