coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-11-26	nb/intel/sandybridge: Add support for DPR	Michał Żygowski
2020-10-13	nb/intel/sandybridge: Improve cbmem_top_chipset calculation	Angel Pons
2020-07-26	nb/intel/sandybridge: Add missing includes	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-03-25	nb/intel/sandybridge: Use SPDX headers	Angel Pons
2020-03-18	nb/intel/sandybridge: Tidy up code and comments	Angel Pons
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2020-02-24	src: capitalize 'RAM'	Elyes HAOUAS
2019-12-29	nb/intel/sandybridge: add and use defines for PCI_DEV(0,0,0) registers	Felix Held
2019-11-01	lib/cbmem_top: Add a common cbmem_top implementation	Arthur Heymans
2019-10-21	src/{device,drivers,mb,nb,soc,sb}: Remove unused 'include <console/console.h>'	Elyes HAOUAS
2019-08-28	intel/smm/gen1: Use smm_subregion()	Kyösti Mälkki
2019-08-26	soc/intel: Use common romstage code	Kyösti Mälkki
2019-08-22	arch/x86: Add <arch/romstage.h>	Kyösti Mälkki
2019-08-15	intel/smm/gen1: Rename header file	Kyösti Mälkki
2019-08-15	arch/x86: Add postcar_frame_common_mtrrs()	Kyösti Mälkki
2019-08-15	cpu/intel: Refactor platform_enter_postcar()	Kyösti Mälkki
2019-08-07	northbridge/intel: Rename ram_calc.c to memmap.c	Kyösti Mälkki