| Age | Commit message (Expand) | Author |
|---|---|---|
| 2014-05-01 | ChromeOS: Remove oprom_is_loaded | Kyösti Mälkki |
| 2014-02-06 | MTRR: Mark all prefetchable resources as WRCOMB. | Vladimir Serbinenko |
| 2013-03-29 | sandybridge: add option to mark graphics memory write-combining. | Aaron Durbin |
| 2013-03-29 | x86: add new mtrr implementation | Aaron Durbin |
| 2013-03-15 | Google Link: Add remaining code to support native graphics | Ronald G. Minnich |
| 2013-03-01 | GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« | Paul Menzel |
| 2013-01-14 | Support for Celeron 1007U | Stefan Reinauer |
| 2012-11-09 | Make register/value lists const | Stefan Reinauer |
| 2012-07-26 | Refactor driver structs | Patrick Georgi |
| 2012-07-24 | Fixes to enable RC6 on IvyBridge | Duncan Laurie |
| 2012-05-01 | Update Ivybridge GT power meter tables | Duncan Laurie |
| 2012-05-01 | Update ivybridge graphics initialization | Duncan Laurie |
| 2012-04-28 | Reverse Vendor ID & Device ID for map_oprom_vendev() | Martin Roth |
| 2012-04-05 | Add support for Intel Sandybridge CPU (northbridge part) | Stefan Reinauer |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |