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path: root/src/northbridge/intel/sandybridge/gma.c
AgeCommit message (Expand)Author
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-29nb/intel/sandybridge/gma: add disable functionPatrick Rudolph
2015-09-07intel/sandybridge: Do not guard native VGA init by #ifdefsAlexandru Gagniuc
2015-07-14intel/sandybridge/gma: Add graphics PCI Device IDs 0x0162 and 0x0152Damien Zammit
2015-06-05device_ops: add device_t argument to acpi_fill_ssdt_generatorAlexander Couzens
2015-05-28igd.asl rewriteVladimir Serbinenko
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-02-15x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert
2014-09-13intel/gma: consolidate vbt codeVladimir Serbinenko
2014-08-13Falco/Slippy: Patch to refactor haswell/gma.c and mainboard/google/slippy/i91...Furquan Shaikh
2014-08-11northbridge/intel/*/gma.c: Remove dead codeEdward O'Callaghan
2014-07-29x230: Deploy VBTVladimir Serbinenko
2014-07-29ivybridge: LVDS gfx init.Vladimir Serbinenko
2014-07-29sandy/ivybridge: Native raminit.Vladimir Serbinenko
2014-06-02sandybridge: Pass chip info to i915lightup.Vladimir Serbinenko
2014-05-01ChromeOS: Remove oprom_is_loadedKyösti Mälkki
2014-02-06MTRR: Mark all prefetchable resources as WRCOMB.Vladimir Serbinenko
2013-03-29sandybridge: add option to mark graphics memory write-combining.Aaron Durbin
2013-03-29x86: add new mtrr implementationAaron Durbin
2013-03-15Google Link: Add remaining code to support native graphicsRonald G. Minnich
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2013-01-14Support for Celeron 1007UStefan Reinauer
2012-11-09Make register/value lists constStefan Reinauer
2012-07-26Refactor driver structsPatrick Georgi
2012-07-24Fixes to enable RC6 on IvyBridgeDuncan Laurie
2012-05-01Update Ivybridge GT power meter tablesDuncan Laurie
2012-05-01Update ivybridge graphics initializationDuncan Laurie
2012-04-28Reverse Vendor ID & Device ID for map_oprom_vendev()Martin Roth
2012-04-05Add support for Intel Sandybridge CPU (northbridge part)Stefan Reinauer
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