summaryrefslogtreecommitdiff
path: root/src/northbridge/intel/sandybridge/Makefile.inc
AgeCommit message (Expand)Author
2019-01-16nb/intel/sandybridge: Remove the C native graphic initArthur Heymans
2018-07-28nb/intel/sandybridge/report_platform: Move remaining code to sb folderPatrick Rudolph
2018-07-28intel/sandybridge: Don't hardcode platform typePatrick Rudolph
2018-06-05cpu/intel/model_206ax: Switch to POSTCAR_STAGEArthur Heymans
2018-04-13nb/intel/sandybridge/peg: Add PEG driver stubPatrick Rudolph
2018-01-26nb/intel/sandybridge: Use common mrc cache functionsArthur Heymans
2017-06-09cpu/intel/model_206ax: Use tsc monotonic timerPatrick Rudolph
2016-12-16nb/intel/sandybridge/raminit: Separate Sandybridge and IvybridgePatrick Rudolph
2016-12-05nb/intel/sandybridge/raminit: Split raminit.cPatrick Rudolph
2016-03-11northbridge/intel: move mrccache.c of sandybridge + haswell to commonAlexander Couzens
2016-03-05sandybridge/gma_lvds: support both Sandy&Ivy on one boardIru Cai
2016-02-13sandybridge: Always include MRC if not using native RAM init.Vladimir Serbinenko
2016-02-12Make MRC vs native a config rather than making a separate chipset for it.Vladimir Serbinenko
2016-02-12Merge sandy/ivybridge romstage flow for MRC and non-MRC.Vladimir Serbinenko
2015-11-04nb/intel/sandybridge: Enable basic IOMMU supportNico Huber
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-03sandybridge ivybridge: Treat native init as first class citizenAlexandru Gagniuc
2015-09-07intel: Do not hardcode the position of mrc.cacheAlexandru Gagniuc
2015-07-13x86: flatten hierarchyStefan Reinauer
2015-07-06Revert "sandy/ivybridge: use LAPIC timer in SMM"Patrick Georgi
2015-07-02sandy/ivybridge: use LAPIC timer in SMMStefan Reinauer
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-04-29kbuild: automatically include northbridgesStefan Reinauer
2015-03-30Update hex values to CBFS binary name types in MakefilesMartin Roth
2014-11-20Replace includes of build.h with version.hKyösti Mälkki
2014-10-24sandybridge: Kill CONFIG_HAVE_MRC_CACHEVladimir Serbinenko
2014-10-24sandy/ivy native: dedup romstage.c main()Vladimir Serbinenko
2014-10-16ACPI: Remove CONFIG_GENERATE_ACPI_TABLESVladimir Serbinenko
2014-08-30sandybridge: Add native sandybridgeVladimir Serbinenko
2014-08-25sandybridge: Native gfx init.Vladimir Serbinenko
2014-07-29ivybridge: LVDS gfx init.Vladimir Serbinenko
2014-07-29sandy/ivybridge: Native raminit.Vladimir Serbinenko
2014-02-17sandy/ivy: Fix mrc.cache file in CBFSKyösti Mälkki
2014-01-24nb/sandybridge: Move MRC cache above mrc.binAlexandru Gagniuc
2014-01-15CBMEM intel: Define get_top_of_ram() once per chipsetKyösti Mälkki
2014-01-15sandybridge: Allow skipping mrc.cacheVladimir Serbinenko
2013-06-28Add support to enable/disable builtin GbE (again)Stefan Reinauer
2013-06-20sandybridge: Store MRC cache in CBFSPatrick Georgi
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2012-11-27Remove AMD special case for LAPIC based udelay()Patrick Georgi
2012-11-27Get rid of drivers classPatrick Georgi
2012-11-12Initial IGD OpRegion implementationStefan Reinauer
2012-05-11Rework Sandybridge MRC cache handlingStefan Reinauer
2012-05-02Strip quotes from Sandybridge MRC blobStefan Reinauer
2012-05-02Sandybridge: Display platform information earlyVadim Bendebury
2012-04-27SMM: Add udelay on Sandybridge systemsStefan Reinauer
2012-04-05Add support for Intel Sandybridge CPU (northbridge part)Stefan Reinauer
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-19 06:27:18 +0000