index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
gitea
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
northbridge
/
intel
/
sandybridge
/
Makefile.inc
Age
Commit message (
Expand
)
Author
2020-03-23
nb/intel/sandybridge: Do not define tables in a header
Angel Pons
2020-03-20
nb/intel/sandybridge: Deduplicate report_memory_config
Angel Pons
2020-03-17
src (minus soc and mainboard): Remove copyright notices
Patrick Georgi
2019-11-18
nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCK
Arthur Heymans
2019-08-07
northbridge/intel: Rename ram_calc.c to memmap.c
Kyösti Mälkki
2019-07-09
arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-class
Kyösti Mälkki
2019-06-08
nb/intel/sandybridge: Drop iommu.c and rename functions
Patrick Rudolph
2019-05-16
nb/intel/sandybridge: Move DMI init code
Patrick Rudolph
2019-05-12
nb/intel/snb: Drop NORTHBRIDGE_INTEL_IVYBRIDGE
Nico Huber
2019-01-16
nb/intel/sandybridge: Remove the C native graphic init
Arthur Heymans
2018-07-28
nb/intel/sandybridge/report_platform: Move remaining code to sb folder
Patrick Rudolph
2018-07-28
intel/sandybridge: Don't hardcode platform type
Patrick Rudolph
2018-06-05
cpu/intel/model_206ax: Switch to POSTCAR_STAGE
Arthur Heymans
2018-04-13
nb/intel/sandybridge/peg: Add PEG driver stub
Patrick Rudolph
2018-01-26
nb/intel/sandybridge: Use common mrc cache functions
Arthur Heymans
2017-06-09
cpu/intel/model_206ax: Use tsc monotonic timer
Patrick Rudolph
2016-12-16
nb/intel/sandybridge/raminit: Separate Sandybridge and Ivybridge
Patrick Rudolph
2016-12-05
nb/intel/sandybridge/raminit: Split raminit.c
Patrick Rudolph
2016-03-11
northbridge/intel: move mrccache.c of sandybridge + haswell to common
Alexander Couzens
2016-03-05
sandybridge/gma_lvds: support both Sandy&Ivy on one board
Iru Cai
2016-02-13
sandybridge: Always include MRC if not using native RAM init.
Vladimir Serbinenko
2016-02-12
Make MRC vs native a config rather than making a separate chipset for it.
Vladimir Serbinenko
2016-02-12
Merge sandy/ivybridge romstage flow for MRC and non-MRC.
Vladimir Serbinenko
2015-11-04
nb/intel/sandybridge: Enable basic IOMMU support
Nico Huber
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-03
sandybridge ivybridge: Treat native init as first class citizen
Alexandru Gagniuc
2015-09-07
intel: Do not hardcode the position of mrc.cache
Alexandru Gagniuc
2015-07-13
x86: flatten hierarchy
Stefan Reinauer
2015-07-06
Revert "sandy/ivybridge: use LAPIC timer in SMM"
Patrick Georgi
2015-07-02
sandy/ivybridge: use LAPIC timer in SMM
Stefan Reinauer
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-04-29
kbuild: automatically include northbridges
Stefan Reinauer
2015-03-30
Update hex values to CBFS binary name types in Makefiles
Martin Roth
2014-11-20
Replace includes of build.h with version.h
Kyösti Mälkki
2014-10-24
sandybridge: Kill CONFIG_HAVE_MRC_CACHE
Vladimir Serbinenko
2014-10-24
sandy/ivy native: dedup romstage.c main()
Vladimir Serbinenko
2014-10-16
ACPI: Remove CONFIG_GENERATE_ACPI_TABLES
Vladimir Serbinenko
2014-08-30
sandybridge: Add native sandybridge
Vladimir Serbinenko
2014-08-25
sandybridge: Native gfx init.
Vladimir Serbinenko
2014-07-29
ivybridge: LVDS gfx init.
Vladimir Serbinenko
2014-07-29
sandy/ivybridge: Native raminit.
Vladimir Serbinenko
2014-02-17
sandy/ivy: Fix mrc.cache file in CBFS
Kyösti Mälkki
2014-01-24
nb/sandybridge: Move MRC cache above mrc.bin
Alexandru Gagniuc
2014-01-15
CBMEM intel: Define get_top_of_ram() once per chipset
Kyösti Mälkki
2014-01-15
sandybridge: Allow skipping mrc.cache
Vladimir Serbinenko
2013-06-28
Add support to enable/disable builtin GbE (again)
Stefan Reinauer
2013-06-20
sandybridge: Store MRC cache in CBFS
Patrick Georgi
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2012-11-27
Remove AMD special case for LAPIC based udelay()
Patrick Georgi
2012-11-27
Get rid of drivers class
Patrick Georgi
2012-11-12
Initial IGD OpRegion implementation
Stefan Reinauer
2012-05-11
Rework Sandybridge MRC cache handling
Stefan Reinauer
2012-05-02
Strip quotes from Sandybridge MRC blob
Stefan Reinauer
2012-05-02
Sandybridge: Display platform information early
Vadim Bendebury
2012-04-27
SMM: Add udelay on Sandybridge systems
Stefan Reinauer
2012-04-05
Add support for Intel Sandybridge CPU (northbridge part)
Stefan Reinauer