summaryrefslogtreecommitdiff
path: root/src/northbridge/intel/sandybridge/Makefile.inc
AgeCommit message (Expand)Author
2014-11-20Replace includes of build.h with version.hKyösti Mälkki
2014-10-24sandybridge: Kill CONFIG_HAVE_MRC_CACHEVladimir Serbinenko
2014-10-24sandy/ivy native: dedup romstage.c main()Vladimir Serbinenko
2014-10-16ACPI: Remove CONFIG_GENERATE_ACPI_TABLESVladimir Serbinenko
2014-08-30sandybridge: Add native sandybridgeVladimir Serbinenko
2014-08-25sandybridge: Native gfx init.Vladimir Serbinenko
2014-07-29ivybridge: LVDS gfx init.Vladimir Serbinenko
2014-07-29sandy/ivybridge: Native raminit.Vladimir Serbinenko
2014-02-17sandy/ivy: Fix mrc.cache file in CBFSKyösti Mälkki
2014-01-24nb/sandybridge: Move MRC cache above mrc.binAlexandru Gagniuc
2014-01-15CBMEM intel: Define get_top_of_ram() once per chipsetKyösti Mälkki
2014-01-15sandybridge: Allow skipping mrc.cacheVladimir Serbinenko
2013-06-28Add support to enable/disable builtin GbE (again)Stefan Reinauer
2013-06-20sandybridge: Store MRC cache in CBFSPatrick Georgi
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2012-11-27Remove AMD special case for LAPIC based udelay()Patrick Georgi
2012-11-27Get rid of drivers classPatrick Georgi
2012-11-12Initial IGD OpRegion implementationStefan Reinauer
2012-05-11Rework Sandybridge MRC cache handlingStefan Reinauer
2012-05-02Strip quotes from Sandybridge MRC blobStefan Reinauer
2012-05-02Sandybridge: Display platform information earlyVadim Bendebury
2012-04-27SMM: Add udelay on Sandybridge systemsStefan Reinauer
2012-04-05Add support for Intel Sandybridge CPU (northbridge part)Stefan Reinauer
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-04 18:37:15 +0000