aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/intel/pineview/pineview.h
AgeCommit message (Expand)Author
2021-02-07nb/intel/pineview: Guard {MCH,DMI,EP}BAR macrosAngel Pons
2021-01-30nb/intel/pineview: Define and use MMCONF_BUS_NUMBERAngel Pons
2020-09-25nb/intel/pineview: Place raminit definitions in raminit.hAngel Pons
2020-09-17nb/intel/pineview: Guard DMIBAR/EPBAR macro parametersAngel Pons
2020-09-17nb/intel/pineview/iomap.h: Rename to memmap.hAngel Pons
2020-08-04nb/intel/pineview: Change signature of `decode_pciebar`Angel Pons
2020-08-03nb/intel/pineview: Put host bridge registers into its own fileAngel Pons
2020-07-01nb/intel/pineview: Drop undefined function declarationAngel Pons
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-06treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi
2020-05-06treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-03-15nb/intel/pineview: Clean up code and commentsAngel Pons
2019-10-01intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROLKyösti Mälkki
2019-05-25nb/intel/pineview: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-01-14nb/intel/pineview: Move the boilerplate mainboard_romstage_entryArthur Heymans
2019-01-14nb/intel/{i945,pineview}: Remove unused functionArthur Heymans
2018-06-07nb/intel/pineview: Enable and allocate 8M for TSEGArthur Heymans
2016-11-21nb/intel: Fix some spelling mistakes in comments and stringsMartin Roth
2016-01-28nb/intel/pineview: Native VGA init (CRT)Damien Zammit
2015-12-02northbridge/intel/pineview: Add remaining boilerplate code for northbridgeDamien Zammit
2015-11-24northbridge/intel/pineview: Add minimal Pineview northbridgeDamien Zammit