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path: root/src/northbridge/intel/pineview/northbridge.c
AgeCommit message (Expand)Author
2018-10-24nb/intel/*: Account for cbmem_top alignmentArthur Heymans
2018-08-01nb/intel/pineview: Don't use PCI operations on the pci_domain deviceArthur Heymans
2018-06-29sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tablesArthur Heymans
2018-05-08{mb,nb,soc}: Remove references to pci_bus_default_ops()Nico Huber
2018-04-30nb/intel/pineview: Get rid of device_tElyes HAOUAS
2017-06-28cpu/intel/pineview: Include speedstepArthur Heymans
2017-04-24nb/intel/pineview: Move to early cbmemArthur Heymans
2017-01-06nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h>Arthur Heymans
2016-07-15intel/pineview: Do not use scratchpad register for ACPI S3Kyösti Mälkki
2016-07-14nb/intel/pineview/northbridge.c: Remove legacy_hole_size_k declarationJonathan Neuschäfer
2016-01-28nb/intel/pineview: Native VGA init (CRT)Damien Zammit
2016-01-20nb/intel/pineview: Use macro names for memory base registersDamien Zammit
2015-12-02northbridge/intel/pineview: Add remaining boilerplate code for northbridgeDamien Zammit