summaryrefslogtreecommitdiff
path: root/src/northbridge/intel/ironlake/raminit.c
AgeCommit message (Expand)Author
2021-01-30nb/intel/ironlake: Use RCBA macrosAngel Pons
2021-01-25nb/intel/ironlake: Drop constant parameterAngel Pons
2021-01-19nb/intel/ironlake: Print MCH dev/revision IDs and CAPIDAngel Pons
2021-01-18lib/ramtest: Fix ram_check() declarationsKyösti Mälkki
2020-12-14nb/intel/ironlake: Add comment about MCH scan chainsAngel Pons
2020-12-14nb/intel/ironlake: Remove unused constantAngel Pons
2020-10-10nb/intel/ironlake: Clean up DMIBAR/EPBAR registersAngel Pons
2020-09-26ironlake: Fix compilation on x86_64Patrick Rudolph
2020-09-22nb/intel/ironlake: Use `MSAC` definitionAngel Pons
2020-09-22nb/intel/ironlake: Use DMIBAR/EPBAR macrosAngel Pons
2020-09-21nb/intel/ironlake: Clean up cosmetics of early ME functionsAngel Pons
2020-09-21nb/intel/ironlake: Clean up `send_heci_uma_message` signatureAngel Pons
2020-09-21nb/intel/ironlake: Reduce the scope of `heci_uma_addr`Angel Pons
2020-09-17nb/intel/ironlake: Do not re-read ME UMA sizeAngel Pons
2020-09-17nb/intel/ironlake: Drop some unused function parametersAngel Pons
2020-09-17nb/intel/ironlake: Drop `heci_bar` field from raminitAngel Pons
2020-09-15nb/intel/ironlake/raminit: Work around compiler bugPatrick Rudolph
2020-08-24mrc_cache: Add mrc_cache fetch functions to support non-x86 platformsShelley Chen
2020-08-03nb/intel/ironlake: Add Generic Non-Core register definitionsAngel Pons
2020-08-03nb/intel/ironlake: Add Generic Non-Core PCI device definitionAngel Pons
2020-08-03nb/intel/ironlake: Add QPI Physical Layer registersAngel Pons
2020-08-03nb/intel/ironlake: Add QPI Physical Layer device definitionAngel Pons
2020-08-03nb/intel/ironlake: Add QPI Link register definitionsAngel Pons
2020-08-03nb/intel/ironlake: Add definition for QPI Link PCI deviceAngel Pons
2020-08-03nb/intel/ironlake: Add SAD DRAM register definitionsAngel Pons
2020-08-03nb/intel/ironlake: Add definition for SAD PCI deviceAngel Pons
2020-08-03nb/intel/ironlake: Drop `D0F0_` prefix from register namesAngel Pons
2020-08-03nb/intel/ironlake: Rename memory map variablesAngel Pons
2020-08-03nb/intel/ironlake/raminit.c: Drop unused defineAngel Pons
2020-07-25nb/intel/ironlake/raminit.c: initialize 'reply.command'Elyes HAOUAS
2020-07-09nb/intel/ironlake/raminit.c: Drop dead codeAngel Pons
2020-06-22device/smbus_host: Declare common early SMBus prototypesKyösti Mälkki
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-06treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi
2020-05-06treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-03-15nb/intel/nehalem: Rename to ironlakeAngel Pons
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-02 09:37:45 +0000