summaryrefslogtreecommitdiff
path: root/src/northbridge/intel/haswell/finalize.c
AgeCommit message (Expand)Author
2020-10-31{cpu,nb}/intel/haswell: Drop unnecessary `UL` suffixAngel Pons
2020-10-24nb/intel/haswell/finalize.c: Align with BroadwellAngel Pons
2020-10-24nb/intel/haswell/finalize.c: Align MC locking with BroadwellAngel Pons
2020-10-24nb/intel/haswell/finalize.c: Lock down MC ARB registerAngel Pons
2020-10-24nb/intel/haswell/finalize.c: Lock PCU DDR PTMAngel Pons
2020-10-24nb/intel/haswell/finalize.c: Drop obsolete SA PM lockAngel Pons
2020-10-24nb/intel/haswell/finalize.c: Use PCI register namesAngel Pons
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-04-05src/northbridge: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-03-15nb/intel/haswell: Tidy up code and commentsAngel Pons
2019-12-19src/northbridge: Remove unused <stdlib.h>Elyes HAOUAS
2019-03-04arch/io.h: Drop unnecessary includeKyösti Mälkki
2018-04-20pci: Move inline PCI functions to pci_ops.hPatrick Rudolph
2017-07-06northbridge/intel/haswell: Fix undefined behaviorRyan Salsamendi
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
2013-03-14haswell: remove explicit pcie config accessesAaron Durbin
2013-03-14haswell: Add initial support for Haswell platformsAaron Durbin
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-05 21:58:45 +0000