coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-11-04	nb/intel: Use defined DEFAULT_RCBA	Elyes HAOUAS
2019-10-24	acpi: Drop wrong _ADR objects for PCI host bridges	Elyes HAOUAS
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2019-03-06	Remove DEFAULT_PCIEXBAR alias	Kyösti Mälkki
2018-11-01	sb/intel/lynxpoint: Automatically generate the ACPI PCI routing table	Tristan Corrick
2017-06-27	nb/intel: add IS_ENABLED() around Kconfig symbol references	Martin Roth
2016-09-20	northbridge/intel/haswell: Add space around operators	Elyes HAOUAS
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-10-23	Intel: Move MCRS ResourceTemplate outside of _CRS method	Martin Roth
2015-10-12	gma: Consolidate Intel IGD ACPI code some more	Nico Huber
2015-05-28	igd.asl rewrite	Vladimir Serbinenko
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-05-01	intel: Correct MMIO related ACPI table settings	Dave Frodin
2015-02-16	acpi: Generate valid ACPI processor objects	Timothy Pearson
2014-07-17	northbridge,ASL: Trivial - drop trailing blank lines at EOF	Edward O'Callaghan
2014-02-24	intel/*/acpi: Increase range length of MCHBAR buffer to 32 kB	Paul Menzel
2013-12-07	haswell: Add ACPI support for Controllable TDP	Duncan Laurie
2013-03-20	haswell: drop memory reservation for sandybridge GPU bug	Duncan Laurie
2013-03-14	haswell: Add initial support for Haswell platforms	Aaron Durbin