coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-08-04	nb/intel/haswell: Use ASL 2.0 syntax	Angel Pons
2020-07-08	nb/intel/haswell/acpi: Update to ASL 2.0 syntax	Angel Pons
2020-07-08	nb/intel/haswell/acpi: Fix host bridge registers	Angel Pons
2020-06-03	northbridge/intel/haswell: Mask lower 20 bits of TOLUD and TOLM in hostbridge...	Furquan Shaikh
2020-06-03	northbridge/intel/haswell: Update hostbridge.asl to ASL2.0	Furquan Shaikh
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-05	src/northbridge: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-23	acpi: Change Processor ACPI Name (Intel only)	Christian Walter
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2020-03-06	nb/intel/haswell/peg: Add PEG driver stub	Chris Morgan
2019-10-24	acpi: Drop wrong _ADR objects for PCI host bridges	Elyes HAOUAS
2018-11-01	sb/intel/lynxpoint: Automatically generate the ACPI PCI routing table	Tristan Corrick
2016-09-20	northbridge/intel/haswell: Add space around operators	Elyes HAOUAS
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-10-23	Intel: Move MCRS ResourceTemplate outside of _CRS method	Martin Roth
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-05-01	intel: Correct MMIO related ACPI table settings	Dave Frodin
2015-02-16	acpi: Generate valid ACPI processor objects	Timothy Pearson
2014-07-17	northbridge,ASL: Trivial - drop trailing blank lines at EOF	Edward O'Callaghan
2013-12-07	haswell: Add ACPI support for Controllable TDP	Duncan Laurie
2013-03-14	haswell: Add initial support for Haswell platforms	Aaron Durbin