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path: root/src/northbridge/intel/gm45/raminit.c
AgeCommit message (Expand)Author
2017-06-12nb/intel/gm45: Add romstage timestampsArthur Heymans
2017-04-19nb/intel/gm45: Hide some output behind DEBUG_RAM_SETUPNico Huber
2016-11-28nb/intel/gm45: Fix panel-power-sequence clock divisorNico Huber
2016-11-21nb/intel: Fix some spelling mistakes in comments and stringsMartin Roth
2016-11-09nb/intel/gm45: Use LAPIC udelay instead of custom versionArthur Heymans
2016-06-12nb/intel/raminit (native): Read PCI mmio size from devicetreePatrick Rudolph
2015-12-31nb/intel/gm45: Export low-power and (SFF) optionsNico Huber
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-02-15x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert
2014-08-16gm45: Decrease MTRR usageVladimir Serbinenko
2014-08-12gm45: Reserve RAM for ME if it's active.Vladimir Serbinenko
2014-07-29gm45: Move spd address map to board-specific config.Vladimir Serbinenko
2014-07-11src: Make use of 'CEIL_DIV(a, b)' macro across treeEdward O'Callaghan
2014-07-01stdlib: Drop duplicates of min() and max()Kyösti Mälkki
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
2012-11-27intel/gm45: new northbridgePatrick Georgi
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