coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2016-11-28	nb/intel/gm45: Fix panel-power-sequence clock divisor	Nico Huber
2016-11-21	nb/intel: Fix some spelling mistakes in comments and strings	Martin Roth
2016-09-13	northbridge/intel/gm45: transation away from device_t	Furquan Shaikh
2015-12-31	nb/intel/gm45: Export low-power and (SFF) options	Nico Huber
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-06-05	device_ops: add device_t argument to write_acpi_tables	Alexander Couzens
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-02-15	x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer	Kevin Paul Herbert
2015-01-06	northbridge/intel: Do not define include guard as 1	Edward O'Callaghan
2014-10-15	gm45: Convert to per-device ACPI	Vladimir Serbinenko
2014-08-16	gm45: Decrease MTRR usage	Vladimir Serbinenko
2014-08-13	gm45: Allow skiping voltage config.	Vladimir Serbinenko
2014-07-29	gm45: Move spd address map to board-specific config.	Vladimir Serbinenko
2013-09-11	CBMEM: Unify get_top_of_ram()	Kyösti Mälkki
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2012-11-27	intel/gm45: new northbridge	Patrick Georgi