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path: root/src/northbridge/intel/fsp_rangeley/fsp
AgeCommit message (Expand)Author
2019-10-05sb,nb/intel/fsp_rangeley: Rename from xx_DEV_FUNCKyösti Mälkki
2019-08-21intel/fsp1_0,baytrail,rangeley: Tidy up use of preprocessorKyösti Mälkki
2019-03-16drivers/intel/fsp1_0: Deduplicate codePatrick Rudolph
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-01-06device: Use pcidev_path_on_root()Kyösti Mälkki
2018-10-22intel: Use CF9 reset (part 1)Patrick Rudolph
2018-07-09src/northbridge: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS
2017-04-25lib: provide clearer devicetree semanticsAaron Durbin
2016-09-20northbridge/intel/fsp_rangeley: Add space around operatorsElyes HAOUAS
2016-08-31northbridge/intel: Add required space before opening parenthesis '('Elyes HAOUAS
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-14Revert "Remove FSP Rangeley SOC and mohonpeak board support"Martin Roth
2015-10-03Remove FSP Rangeley SOC and mohonpeak board supportAlexandru Gagniuc
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-04-24fsp: Move fsp to fsp1_0Marc Jones
2015-02-06FSP & CBMEM: Fix broken cbmem CAR transition.Martin Roth
2015-01-31intel/rangeley: Update UPD_DATA_REGION to support POST-GOLD 2 FSPYork Yang
2014-10-19x86 romstage: Move stack just below RAMTOPKyösti Mälkki
2014-07-30northbridge/intel: Add fsp_rangeley northbridge supportMartin Roth
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