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path: root/src/northbridge/amd
AgeCommit message (Expand)Author
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-28Improving BKDG implementation of P-states,Xavi Drudis Ferran
2011-02-27Add 300 MHz and 500 MHz HT frequency limitsXavi Drudis Ferran
2011-02-24Add compile-time defaults to some K8 CMOS options in case they're absent in CMOSJosef Kellermann
2011-02-14Errata #169 works on HT, not MCJosef Kellermann
2011-02-14This code provides cpu northbridge initialization for Family 14h cpus. It is ...Frank Vibrans
2011-02-10Implemented workaround for erratum 169, obsoleting erratum 131.Alexandru Gagniuc
2011-01-20For Cx, each ChipSel need to be sent MR command.Zheng Bao
2011-01-19Add a GX2 Kconfig option to choose the framebuffer size.Nils Jacobs
2011-01-17The code is tested on my board with register DIMMs. More tests need to beZheng Bao
2011-01-06Fix some settings fo AMD MCT. It is based on BIOS test suite.Zheng Bao
2010-12-30Use die() to assure the processor can't wake up from an interrupt.Nils Jacobs
2010-12-29-Change the remaining GLIU1 port 5 register names from VIP (Video Input Port)Nils Jacobs
2010-12-26Move Geode GX2 UMA video memory size to KconfigNils Jacobs
2010-12-26Remove dead and unused Geode GX2 codeNils Jacobs
2010-12-26Replace Geode GX2 MSR addresses for GLCP on GLIU1 with namesNils Jacobs
2010-12-26Clean up Geode GX2 comments, whitespace and coding style. Trivial.Nils Jacobs
2010-12-13Attached patch implements the memory speed reductions (and 2T/1T clock logic)...Rudolf Marek
2010-12-13Following patch adds support to bring out the memory out of self refresh when...Rudolf Marek
2010-12-13We hardcode highmemory size in every northbridge! This is bad, and especiall...Rudolf Marek
2010-12-11After this has been brought up many times before, rename src/arch/i386 toStefan Reinauer
2010-12-08second round name simplification. drop the <component>_ prefix.stepan
2010-12-07Move MMCONF resource into the domain for fam10 for the resource allocator.Myles Watson
2010-12-02More explicite and straight way to set seed.Zheng Bao
2010-11-221) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_AC...Rudolf Marek
2010-11-22Printing coreboot debug messages on VGA console is pretty much useless, sinceStefan Reinauer
2010-11-20Some more DIMM0 related cleanups and deduplication.Uwe Hermann
2010-11-18Fix/drop some obsolete comments,Uwe Hermann
2010-11-17This problem was introduced withTobias Diedrich
2010-11-13MTRR related improvements for AMD family 10h and family 0Fh systemsScott Duplichan
2010-11-10Make amdk8 printk_raminit() accept just a single string parameterPeter Stuge
2010-11-07Move K8_ALLOCATE_IO_RANGE to Kconfig.Patrick Georgi
2010-11-05Move QRANK_DIMM_SUPPORT to Kconfig, removing it from romstage.cPatrick Georgi
2010-11-05Add Kconfig CPU speed selection to Geode GX2 boards.Nils Jacobs
2010-11-05Remove banner wrapper function and unify print(k) usage.Nils Jacobs
2010-11-03Remove some unused code from gx2/raminit.c.Nils Jacobs
2010-11-03Clean up some comments and white space in gx2/northbridgeinit.cNils Jacobs
2010-11-01Change Geode GX2 to use the auto DRAM detect code from Geode LX.Nils Jacobs
2010-11-01Remove some unused code.Nils Jacobs
2010-11-01GX2: Clean up some white space and comments.Nils Jacobs
2010-11-01GX2: Change MSR register numbers into more descriptive names.Nils Jacobs
2010-10-26Convert some comments to proper Doxygen syntax.Uwe Hermann
2010-10-19Revision 5966 changed the end of line style of the 3 modified files. This cha...Scott Duplichan
2010-10-19When debug logging is enabled, a message such as '* AP 02 timed out:02010501'Scott Duplichan
2010-10-13Trivial. Clean up code and add some comments.Zheng Bao
2010-10-11Factor out a few commonly duplicated functions from northbridge.c.Uwe Hermann
2010-10-09Trivial. Spell checking.Zheng Bao
2010-10-09Trivial. Spell checking.Zheng Bao
2010-10-08Trivial. Spell checking.Zheng Bao
2010-10-08Trivial. Fix the typo.Zheng Bao
2010-10-07Remove duplicate line from pci_ids.h.Jonathan Kollasch
2010-10-05Use %p instead of %x to print void *.Jonathan Kollasch
2010-10-02Fix spelling/typos in comments.Jonathan Kollasch
2010-10-01Move CACHE_AS_RAM_ADDRESS_DEBUG out of romstage.c into Kconfig,Patrick Georgi
2010-10-01Trivial. Re-indent the code.Zheng Bao
2010-09-30Rename build system variables to be more intuitive, andPatrick Georgi
2010-09-28Trivial. re-Indent the code.Zheng Bao
2010-09-27Obviously missing brackets.Xavi Drudis Ferran
2010-09-25Mark read-only data as read-only, so the global vars test doesn't fail on it.Patrick Georgi
2010-09-25- Fix race condition in option_table.h generation by moving the includeStefan Reinauer
2010-09-21Complete the code which was missing.Zheng Bao
2010-09-21Fix the typo. Field DisAutoRefresh is in DramTimngHi.Zheng Bao
2010-09-13Add reserved areas for fam10.Myles Watson
2010-09-13Port k8 UMA handling to fam10.Myles Watson
2010-09-13Fix a typo reported by Sylvain Hitier.Myles Watson
2010-09-10Move memory type information out of some AMD sockets.Myles Watson
2010-09-09Please find appended. This patch gets rid of the %gs magic altogether,Arne Georg Gleditsch
2010-09-09Also improve boot time on AMD for the DDR3 code path.Arne Georg Gleditsch
2010-09-09Apparently, it's not crucial to clear this at the exact moment we switchArne Georg Gleditsch
2010-09-05Trivial. Currently the max frequency is preset as 400Mhz. We need to set aZheng Bao
2010-09-04AMD DDR2 and DDR3 MCT function InitPhyCompensation() compliant with AGESA code.Kerry She
2010-08-31Get Byte65/66 for register manufacture ID code. RegMan1Present willZheng Bao
2010-08-30Multi-DIMMS on AMD ddr2 MCT channel B fixed.Kerry She
2010-08-30Multi-DIMMS on AMD ddr3 MCT channel B works.Kerry She
2010-08-30Trivial syntax correction of AMD mct_ddr3 dir.Kerry She
2010-08-27drop three unneeded config variables:Jens Rottmann
2010-08-26CONFIG_DEBUG_RAM_SETUP and CONFIG_DEBUG_SMBUS are only available if the board /Jens Rottmann
2010-08-24* Adds support for PC Engines Alix.2D(1)3 board to Coreboot.Aurelien Guillaume
2010-08-22documented workaround erratum 414, seeXavi Drudis Ferran
2010-08-22documented workaround erratum 372, seeXavi Drudis Ferran
2010-08-22Include RB_C3 in erratum 346Xavi Drudis Ferran
2010-08-22Add RB_C3 to AMD_FAM10_ALL so that it gets its MSR right for mtrs, ht, etc.Xavi Drudis Ferran
2010-08-17Fix warnings (that become errors) in AMDHT for certain configurations (unused...Xavi Drudis Ferran
2010-08-05The number of cores is got by reading the bit 15,13,12 of [0,24,3,e8].Zheng Bao
2010-07-26This patch converts the Geode GX2 boards to CAR.Nils Jacobs
2010-07-09Trivial -Werror fix.Cristi M
2010-07-08Fix all warnings in the tree Stefan Reinauer
2010-07-08get rid of even more fam10 and k8 warnings.Stefan Reinauer
2010-07-07fix some more warningsStefan Reinauer
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