summaryrefslogtreecommitdiff
path: root/src/northbridge/amd/amdmct/mct_ddr3
AgeCommit message (Expand)Author
2016-04-08nb/amd/mct_ddr3: Add MCE reporting logicTimothy Pearson
2016-04-08nb/amd/mct_ddr3: Cache whether ECC is allowed at the platform levelTimothy Pearson
2016-03-31nb/amd_mct_ddr3: Move DRAM MCE sync flood enable to ramstageTimothy Pearson
2016-03-31nb/amd/mct_ddr3: Clear early MCEs and report DRAM MCEsTimothy Pearson
2016-03-31nb/amd/mct_ddr3: Disable MCE framework during DRAM trainingTimothy Pearson
2016-03-30nb/amd/mct_ddr3: Enable DIMM parity when RDIMMs installedTimothy Pearson
2016-03-30northbridge/amd/amdfam10: Add family15h model10h-1fh (Trinity)Damien Zammit
2016-03-28nb/amd/mct_ddr3: Use standard C function calls in mct_ResetDataStruct_D()Timothy Pearson
2016-03-26nb/amd/amdmct: Select max_lanes based on ECC presence or absenceDamien Zammit
2016-03-24nb/amd/mct_ddr3: Set the NBP0 read latency from P0 trained valuesTimothy Pearson
2016-03-23nb/amd/mct_ddr3: Remove spurious Addl_Index variable in dqsTrainMaxRdLatency_...Timothy Pearson
2016-03-21nb/amd/amdmct/mct_ddr3: Ensure BlockRxDqsLock does not remain setTimothy Pearson
2016-03-13nb/amd/mct_ddr3: Use correct initial UI setting during DRAM trainingTimothy Pearson
2016-03-12nb/amd/mct_ddr3: Consolidate duplicated codeTimothy Pearson
2016-03-11nb/amd/mct_ddr3: Train correct receiver in TrainDQSRdWrPos_D_Fam15Timothy Pearson
2016-03-11nb/amd/mct_ddr3: Consolidate calls to MCT minimum clock setting fetchTimothy Pearson
2016-03-11nb/amd/mct_ddr3: Require minumum training quality for both read and writeTimothy Pearson
2016-03-11nb/amd/mct_ddr3: Set read DQS delay to 1UI before calculating read latencyTimothy Pearson
2016-03-11nb/amd/mct_ddr3: Properly initialize arrays and add bounds checksTimothy Pearson
2016-03-11nb/amd/mct_ddr3: Restore previous DQS delay values on failed loopTimothy Pearson
2016-02-19nb/amd/amdmct: Add socket specific configuration for FM2Damien Zammit
2016-02-05nb/amd/mct_ddr3: Fix RDIMM training failure on Fam15hTimothy Pearson
2016-02-05nb/amd/mct_ddr3: Work around RDIMM training failureTimothy Pearson
2016-02-02src: Fix various spelling and whitespace issues.Martin Roth
2016-02-01nb/amd/amdmct/mct_ddr3: Save and restore SkewMemClk for S3 resumeTimothy Pearson
2016-01-29nb/amdmct/mct_ddr3: Enable mainboard voltage setTimothy Pearson
2016-01-24nb/amd/mct_ddr3: Properly set MR0 WR valueTimothy Pearson
2016-01-24nb/amd/mct_ddr3: Add additional verbose-level debug statementsTimothy Pearson
2016-01-24nb/amd/mct_ddr3: Update drive strength configurationTimothy Pearson
2016-01-24northbridge/amd/amdmct/mct_ddr3: Enable fast refresh on ETR devicesTimothy Pearson
2016-01-24northbridge/amd/amdmct: Add termination and timing values for C32 socketsTimothy Pearson
2016-01-13tree: drop last paragraph of GPL copyright header from new filesMartin Roth
2015-12-01nb/amd/mct_ddr3: Add Family 15h tristate enable codesTimothy Pearson
2015-11-30nb/amd/amdmct/mct_ddr3: Use StopOnError to decrease training timeTimothy Pearson
2015-11-30nb/amd/mct_ddr3: Use antiphase to better center DQS windowTimothy Pearson
2015-11-29nb/amd/mct_ddr3: Fix odd rank data corruptionTimothy Pearson
2015-11-29nb/amd/amdmct/mct_ddr3: Fix a minor RDIMM CS select errorTimothy Pearson
2015-11-29nb/amd/amdmct/mct_ddr3: Ensure channel clock skew is properly setTimothy Pearson
2015-11-24northbridge/amd/amdmct/mct_ddr3: Add CC6 setup information messagesTimothy Pearson
2015-11-24northbridge/amd/amdmct/mct_ddr3: Add DDR3 termination debug outputTimothy Pearson
2015-11-24amd/amdfam10: Control Fam15h cache partitioning via nvramTimothy Pearson
2015-11-23amd/amdmct/mct_ddr3: Fix poor performance on Family 15h CPUsTimothy Pearson
2015-11-22amd/amdmct/mct_ddr3: Set prefetch double stride to improve performanceTimothy Pearson
2015-11-22nb/amd/amdmct/mct_ddr3: Force DRAM retraining on every bootTimothy Pearson
2015-11-19northbridge/amd/amdmct/mct_ddr3: Move K10D configuration into separate fileTimothy Pearson
2015-11-18cpu/amd/fam10h-fam15h: Update Fam15h APIC config and startup sequenceTimothy Pearson
2015-11-16northbridge/amd/mct_ddr3: Add registered and x4 DIMM support to Fam15hTimothy Pearson
2015-11-16amd/amdmct/mct_ddr3: Partially fix up registered DIMMs on Fam10hTimothy Pearson
2015-11-16nb/amd/mct_ddr3: Fix RDIMM errors due to undefined number of slotsTimothy Pearson
2015-11-15northbridge/amd/amdmct/mct_ddr3: Fix Family 10h boot failureTimothy Pearson
2015-11-15northbridge/amd/amdmct/mct_ddr3: Properly indicate clobbered registersTimothy Pearson
2015-11-15northbridge/amd/amdmct/mct_ddr3: Set SkewMemClk when both DCTs are in useTimothy Pearson
2015-11-15northbridge/amd/amdmct/mct_ddr3: Add missing Family 15h RDIMM Rtt valuesTimothy Pearson
2015-11-15northbridge/amd/amdmct/mct_ddr3: Fix null pointer access and related hangsTimothy Pearson
2015-11-15northbridge/amd/amdmct/mct_ddr3: Work around strange phy training issueTimothy Pearson
2015-11-15northbridge/amd/amdmct/mct_ddr3: Attempt to recover from phy training errorsTimothy Pearson
2015-11-15amd/amdmct/mct_ddr3: Add Family 15h RDIMM timing and ODT valuesTimothy Pearson
2015-11-15cpu/amd: Fix AMD Family 15h ECC initialization reliability issuesTimothy Pearson
2015-11-15northbridge/amd/amdmct/mct_ddr3: Fix lockups and wasted time during ECC initTimothy Pearson
2015-11-14northbridge/amd/amdmct/mct_ddr3: Add additional debug trace statementsTimothy Pearson
2015-11-14northbridge/amd/amdfam10: Properly indicate node and channel in SMBIOS tablesTimothy Pearson
2015-11-12northbridge/amd/amdmct/mct_ddr3: Update prefetcher configurationTimothy Pearson
2015-11-12northbridge/amd/amdmct: Clear memory before enabling ECCTimothy Pearson
2015-11-12src/northbridge/amd/amdmct: Add option to override bad SPD checksumTimothy Pearson
2015-11-12northbridge/amd/amdmct: Verify MCT NVRAM options before skipping trainingTimothy Pearson
2015-11-11northbridge/amd/amdmct: Skip DCT config write to Flash if unchangedTimothy Pearson
2015-11-11cpu/amd: Add CC6 supportTimothy Pearson
2015-11-11mainboard/asus/kgpe-d16: Enable CC6Timothy Pearson
2015-11-11northbridge/amd/amdfam10: Enable CC6 DRAM save area setupTimothy Pearson
2015-11-11amd/amdmct/mct_ddr3: Use training values from previous boot if possibleTimothy Pearson
2015-11-11amd/amdmct/mct_ddr3: Improve SPD DIMM detect reliabilityTimothy Pearson
2015-11-10northbridge/amd/amdmct/mct_ddr3: Clean up curly brace style violationsTimothy Pearson
2015-11-10northbridge/amd/amdmct: Read SPD data into cache to decrease bootup timeTimothy Pearson
2015-11-08amdmct/mct_ddr3: Disable Fam10h-specific MTRR setup on Fam15hTimothy Pearson
2015-11-02cpu/amd: Add initial AMD Family 15h supportTimothy Pearson
2015-11-02northbridge/amd/amdmct/mct_ddr3: Fix S3 suspend overrunning the stack size limitTimothy Pearson
2015-11-02northbridge/amd/amdfam10: Set DIMM voltage based on SPD dataTimothy Pearson
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-30northbridge/amd/amdmct/mct_ddr3: Add initial Suspend to RAM (S3) supportTimothy Pearson
2015-10-26northbridge/amd/amdmct: Fix broken AMD K10 DDR3 memory initalizationTimothy Pearson
2015-10-23northbridge/amd/amdmct: Fix Family 15h detectionTimothy Pearson
2015-10-23northbridge/amd/amdmct/mct_ddr3: Fix curly brace style violationsTimothy Pearson
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-04-01northbridge/amd/amdfam10: Collect DIMM information for ramstage useTimothy Pearson
2015-04-01northbridge/amd/amdmct: Pack MCT and DCT info structsTimothy Pearson
2015-02-15northbridge/amd/amdmct: Fix FTBFS with node interleaving enabledTimothy Pearson
2015-01-08northbridge/amd: Doxygen fixesMartin Roth
2015-01-06northbridge: Drop print_ implementation from non-romcc boardsStefan Reinauer
2014-07-29Uniformly spell frequency unit symbol as HzElyes HAOUAS
2014-05-23northbridge/amd/amdmct: Superfluous parenthesis in if-statementsEdward O'Callaghan
2014-05-22northbridge/amd/amdmct/mct: Initialize variables at the eolEdward O'Callaghan
2014-01-28x86: add common definitions for control registersAaron Durbin
2013-06-03northbridge/amd/amdmct: Use `static const` instead of `const static`Paul Menzel
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2012-03-02Fix ECC disable option for AMD Fam10 DDR2 and DDR3.Marc Jones
2011-10-15AMD CPU and chipset fixes for compilation with gcc 4.6Stefan Reinauer
2011-06-03This patch sets max freq defaults for ddr2 and ddr3for fam10.Marc Jones
2011-01-20For Cx, each ChipSel need to be sent MR command.Zheng Bao
2011-01-17The code is tested on my board with register DIMMs. More tests need to beZheng Bao
2011-01-06Fix some settings fo AMD MCT. It is based on BIOS test suite.Zheng Bao
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-07 12:12:59 +0000