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src
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mainboard
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siemens
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mc_apl1
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variants
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mc_apl3
/
mainboard.c
Age
Commit message (
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Author
2020-11-30
mb/siemens/mc_apl1: Deduplicate wait_for_legacy_dev()
Angel Pons
2020-11-23
mb/siemens/mc_apl1: Use `pci_or_config16` function
Angel Pons
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-04-04
mainboard/siemens: Use SPDX for GPL-2.0-only files
Angel Pons
2020-03-18
mainboard/[^a-p]*: Remove copyright notices
Patrick Georgi
2019-05-29
src/mainboard: Add missing 'include <types.h>'
Elyes HAOUAS
2019-03-04
arch/io.h: Add missing includes
Kyösti Mälkki
2018-11-12
siemens/mc_apl3: Disable PCI clock outputs on XIO bridges
Mario Scheithauer
2018-11-12
siemens/mc_apl3: Set Full Reset Bit into Reset Control Register
Mario Scheithauer
2018-11-12
siemens/mc_apl3: Set bus master bit for on-board PCI device
Mario Scheithauer
2018-11-12
siemens/mc_apl3: Remove the correction of the Tx signal for SATA
Mario Scheithauer
2018-11-12
siemens/mc_apl3: Adjust Legacy IRQ routing for PCI devices
Mario Scheithauer
2018-10-30
siemens/mc_apl3: Add new mainboard variant mc_apl3
Mario Scheithauer