coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-01-04	sb/intel: Use `bool` for PCIe coalescing option	Angel Pons
2021-06-07	bd82x6x boards: Drop redundant `c2_latency`	Angel Pons
2021-05-18	mainboard: Use decimal for `device lapic 0x0 on`	Angel Pons
2021-05-18	mainboard: Use decimal for `device domain 0x0 on`	Angel Pons
2021-05-18	mainboard: Use decimal for `device cpu_cluster 0x0 on`	Angel Pons
2021-01-06	cpu/intel/model_206ax: Rename `cX_acpower` options	Angel Pons
2021-01-06	cpu/intel/model_206ax: Unify ACPI C-state options	Angel Pons
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-10	src/mainboard: Replace GPLv2 long form headers with SPDX header	Elyes HAOUAS
2020-03-18	mainboard/[^a-p]*: Remove copyright notices	Patrick Georgi
2020-03-03	LGA1155 mainboards: Remove gfx.did and gfx.ndid	Angel Pons
2020-01-05	mb/sapphire/pureplatinumh61: Make devicetree prettier	Angel Pons
2020-01-05	mb/sapphire/pureplatinumh61/devicetree.cb: Drop zero values	Angel Pons
2019-09-30	sb/intel/bd82x6x: Use common final SPI OPs setup	Arthur Heymans
2019-07-19	sb/intel/{bd82x6x\|ibexpeak}: Drop p_cnt_throttling_supported	Patrick Rudolph
2019-01-24	cpu/intel/model_206ax: Remove the notion of sockets	Arthur Heymans
2019-01-23	mb///devicetree.cb: Make sandybridge devicetree uniform	Arthur Heymans
2018-05-02	mb/sapphire/pureplatinumh61: Use custom SPI OPMENU	Nicola Corna
2017-04-13	mainboard/sapphire/pureplatinumh61: Enable EuP and PME	Nicola Corna
2017-03-27	mainboard: Add Sapphire Pure Platinum H61	Nicola Corna